From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754297AbdA3UZ2 (ORCPT ); Mon, 30 Jan 2017 15:25:28 -0500 Received: from mail-qk0-f173.google.com ([209.85.220.173]:36105 "EHLO mail-qk0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752668AbdA3UZ0 (ORCPT ); Mon, 30 Jan 2017 15:25:26 -0500 Date: Mon, 30 Jan 2017 15:25:10 -0500 From: Sean Paul To: John Keeping Cc: Mark Yao , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 13/24] drm/rockchip: dw-mipi-dsi: fix escape clock rate Message-ID: <20170130202510.GP20076@art_vandelay> References: <20170129132444.25251-1-john@metanate.com> <20170129132444.25251-14-john@metanate.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170129132444.25251-14-john@metanate.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Jan 29, 2017 at 01:24:33PM +0000, John Keeping wrote: > This clock rate is derived from the PHY PLL, so it should be calculated > dynamically. Use the same calculation as the vendor kernel to derive > the escape clock speed. > Nit below, but Reviewed-by: Sean Paul > Signed-off-by: John Keeping > Reviewed-by: Chris Zhong > --- > v3: > - Improve the commit message a bit > - Add Chris' Reviewed-by > Unchanged in v2 > > drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > index 290282e86d16..c2e0ba96e0a0 100644 > --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > @@ -710,11 +710,13 @@ static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi) > > static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) > { Nit: It would be nice to add a comment to the effect of "You are not meant to understand this, it comes from the vendor kernel" > + u32 esc_clk_division = (dsi->lane_mbps >> 3) / 20 + 1; > + > dsi_write(dsi, DSI_PWR_UP, RESET); > dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK > | PHY_RSTZ | PHY_SHUTDOWNZ); > dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) | > - TX_ESC_CLK_DIVIDSION(7)); > + TX_ESC_CLK_DIVIDSION(esc_clk_division)); > } > > static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, > -- > 2.11.0.197.gb556de5.dirty > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Sean Paul, Software Engineer, Google / Chromium OS