From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753798AbdBASeE (ORCPT ); Wed, 1 Feb 2017 13:34:04 -0500 Received: from foss.arm.com ([217.140.101.70]:43308 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752996AbdBASeC (ORCPT ); Wed, 1 Feb 2017 13:34:02 -0500 Date: Wed, 1 Feb 2017 18:34:01 +0000 From: Will Deacon To: Catalin Marinas Cc: Mark Rutland , Mark Langsdorf , kvm@vger.kernel.org, Radim =?utf-8?B?S3LEjW3DocWZ?= , Marc Zyngier , Jon Masters , timur@codeaurora.org, Jonathan Corbet , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, shankerd@codeaurora.org, Christopher Covington , Neil Leeder , Paolo Bonzini , kvmarm@lists.cs.columbia.edu, Christoffer Dall , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 2/4] arm64: Work around Falkor erratum 1003 Message-ID: <20170201183400.GA31652@arm.com> References: <20170131123735.GD11191@leverpostej> <36478002-4cd8-7f1c-1a25-8bfe35022a47@codeaurora.org> <3cab36fb-984a-beae-64db-6ce830ba94f6@arm.com> <20170201163358.GG8177@arm.com> <20170201173609.GE26507@e104818-lin.cambridge.arm.com> <20170201174105.GK8177@arm.com> <20170201174934.GF26507@e104818-lin.cambridge.arm.com> <20170201175947.GL8177@arm.com> <20170201182244.GH26507@e104818-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170201182244.GH26507@e104818-lin.cambridge.arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 01, 2017 at 06:22:44PM +0000, Catalin Marinas wrote: > On Wed, Feb 01, 2017 at 05:59:48PM +0000, Will Deacon wrote: > > On Wed, Feb 01, 2017 at 05:49:34PM +0000, Catalin Marinas wrote: > > > On Wed, Feb 01, 2017 at 05:41:05PM +0000, Will Deacon wrote: > > > > Maybe > > > > just select ARM64_PAN if the erratum workaround is selected, then > > > > runtime warning if we find that the h/w doesn't have PAN but does have > > > > the erratum (which should never fire)? > > > > > > You still need this workaround even if you don't want any PAN (both sw > > > and hw PAN disabled). I wouldn't want to select ARM64_PAN since it's not > > > a dependency. It's more like if you do need a PAN, make sure you only > > > use the hw one. > > > > True, in the case that all PAN options are disabled we still want this > > to work. How about: > > > > select ARM64_PAN if ARM64_SW_TTBR0_PAN > > As I replied to myself, the above would work for me as well, so let's go > for this. > > > In fact, what's the reason for supporting SW_PAN and ARM64_PAN as a > > config combination? Why not just have "PAN" that enables them both and > > uses the hardware feature if it's there? > > Because SW PAN has a non-trivial performance hit. You would enable SW > PAN only if you are paranoid about security. HW PAN, OTOH, is very cheap > and I wouldn't want to miss enabling it in a single Image supporting > ARMv8.0 and ARMv8.1 just because SW PAN is slow on ARMv8.0. > > IOW, ARM64_PAN is default y while ARM64_SW_TTBR0_PAN is default n. Ok, in that case, then how about another permutation: we make ARM64_SW_TTBR0_PAN depend on ARM64_PAN? Then when you select "PAN Support" you get a new menu option underneath it for the emulation? I think that solves the erratum case and the use-case above. Will