From: Vinod Koul <vinod.koul@intel.com>
To: Jiada Wang <jiada_wang@mentor.com>
Cc: dan.j.williams@intel.com, dmaengine@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/1] dma: imx-sdma: add 1ms delay to ensure SDMA channel is stopped
Date: Mon, 13 Feb 2017 15:52:55 +0530 [thread overview]
Message-ID: <20170213102254.GK2843@localhost> (raw)
In-Reply-To: <e1cd4749-7c66-b918-abc5-7f9e24cd2ff0@mentor.com>
On Mon, Feb 13, 2017 at 03:30:19PM +0900, Jiada Wang wrote:
> >>+static int sdma_disable_channel_with_delay(struct dma_chan *chan)
> >>+{
> >>+ sdma_disable_channel(chan);
> >>+ mdelay(1);
> >
> >what is the gaurantee that 1ms is fine? Shouldn't you poll the bit to see
> >channel is disabled properly..
> >
> I got the information from NXP (freescale) R&D team,
> according to them, by write '1' to SDMA_H_STATSTOP, only disables
> the related sdma channel (so poll HE bit will indicates the channel
> has been disabled),
> but it cannot ensure SDMA core stop to access modules' FIFO,
> SDMA core may still is running, this is a bug in HW.
Okay b ut you are not doing the HE bit here..??
>
> regarding if the '1ms' is enough to ensure SDMA core has stopped,
> NXP R&D team mentioned:
> "we should add some delay of one BD SDMA cost time after disable the
> channel bit, the maximum is 1ms"
> so I assume 1ms should work for all cases
At least please document this in changelog and comments in code.
--
~Vinod
next prev parent reply other threads:[~2017-02-13 10:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-10 14:46 [PATCH 1/1] dma: imx-sdma: add 1ms delay to ensure SDMA channel is stopped jiada_wang
2017-02-13 2:05 ` Vinod Koul
2017-02-13 6:30 ` Jiada Wang
2017-02-13 10:22 ` Vinod Koul [this message]
2017-03-01 8:14 ` Jiada Wang
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