From: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
To: bob smith <sfmc68@verizon.net>
Cc: rth@twiddle.net, ink@jurassic.park.msu.ru, mattst88@gmail.com,
stern@rowland.harvard.edu, j.alglave@ucl.ac.uk,
luc.maranget@inria.fr, parri.andrea@gmail.com,
will.deacon@arm.com, linux-alpha@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: Question about DEC Alpha memory ordering
Date: Mon, 13 Feb 2017 11:09:31 -0800 [thread overview]
Message-ID: <20170213190931.GK30506@linux.vnet.ibm.com> (raw)
In-Reply-To: <ee22c179-9020-7101-96df-30f8e2e469b8@verizon.net>
On Mon, Feb 13, 2017 at 01:53:27PM -0500, bob smith wrote:
> On 2/13/17 1:39 PM, Paul E. McKenney wrote:
> > can real DEC Alpha hardware end up with both instances of "r1"
> > having the value 1?
>
> I thought this question reminded me of something, so I found this:
> > https://www.kernel.org/doc/Documentation/memory-barriers.txt
>
> and I pasted in the content - David Howells is one of the authors and
> maybe that is why the question sort of reminded me.
>
> Maybe someone has an update but this is what was said then.
Well, thank you for pointing me to this, but my question was intended to
check whether or not the words I helped to write in memory-barriers.txt
are in fact accurate. So if you have an SMP DEC Alpha system that you
could provide remote access to, that would be very helpful!
Thanx, Paul
[ . . . ]
next prev parent reply other threads:[~2017-02-13 19:09 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-13 18:39 Question about DEC Alpha memory ordering Paul E. McKenney
2017-02-13 18:53 ` bob smith
2017-02-13 19:08 ` Will Deacon
2017-02-13 19:09 ` Paul E. McKenney [this message]
2017-02-13 19:14 ` Tobias Klausmann
2017-02-13 20:28 ` Paul E. McKenney
2017-02-13 21:06 ` Alan Stern
2017-02-13 21:24 ` Paul E. McKenney
2017-02-14 11:35 ` Andrea Parri
2017-02-14 19:26 ` Michael Cree
2017-02-14 20:12 ` Andrea Parri
2017-02-13 19:23 ` Michael Cree
2017-02-13 20:32 ` Paul E. McKenney
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