From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751351AbdBWOqt (ORCPT ); Thu, 23 Feb 2017 09:46:49 -0500 Received: from foss.arm.com ([217.140.101.70]:55402 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751098AbdBWOqq (ORCPT ); Thu, 23 Feb 2017 09:46:46 -0500 Date: Thu, 23 Feb 2017 14:45:50 +0000 From: Will Deacon To: Shanker Donthineni Cc: Catalin Marinas , linux-kernel , linux-arm-kernel , James Morse , Mark Rutland , Vikram Sethi Subject: Re: [PATCH] arm64: Fix the kernel panic() on QDF2400 platform Message-ID: <20170223144550.GE27512@arm.com> References: <1487819448-8715-1-git-send-email-shankerd@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1487819448-8715-1-git-send-email-shankerd@codeaurora.org> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 22, 2017 at 09:10:48PM -0600, Shanker Donthineni wrote: > The commit 38fd94b0 'arm64: Work around Falkor erratum 1003' has > been added to fix the hardware bug but causing a system crash. > The value of the register x1 which contains 'struct mm_struct *' > should be preserved inside macro pre_ttbr0_update_workaround. > > Macro pre_ttbr0_update_workaround expects 2nd and 3rd arguments > are temporary registers. Don't clobber register x1, Otherwise > the next load operation 'mmid x1 x1' access the invalid address. Whilst I'm pleased that you've sent a fix (and I'll pick it up), I have to ask... did anybody actually test the original patch? If so, why wasn't this found earlier? Will