From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751562AbdBXNMU (ORCPT ); Fri, 24 Feb 2017 08:12:20 -0500 Received: from mga02.intel.com ([134.134.136.20]:27812 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751541AbdBXNLt (ORCPT ); Fri, 24 Feb 2017 08:11:49 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,201,1484035200"; d="scan'208";a="1101851934" Date: Fri, 24 Feb 2017 14:57:43 +0200 From: Jarkko Sakkinen To: Peter Huewe Cc: Jason Gunthorpe , tpmdd-devel@lists.sourceforge.net, linux-kernel@vger.kernel.org, peterhuewe@gmx.de, Christophe Ricard , stable@vger.kernel.org, Alexander Steffen Subject: Re: [PATCH 3/5] tpm_tis_spi: Check correct byte for wait state indicator Message-ID: <20170224125743.dtiot3ygqstneve4@intel.com> References: <1487261306-2494-1-git-send-email-peter.huewe@infineon.com> <1487261306-2494-4-git-send-email-peter.huewe@infineon.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1487261306-2494-4-git-send-email-peter.huewe@infineon.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.6.2-neo (2016-08-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 16, 2017 at 04:08:24PM +0000, Peter Huewe wrote: > Wait states are signaled in the last byte received from the TPM in > response to the header, not the first byte. Check rx_buf[3] instead of > rx_buf[0]. > > Cc: > Fixes: 0edbfea537d1 ("tpm/tpm_tis_spi: Add support for spi phy") > Signed-off-by: Alexander Steffen > Signed-off-by: Peter Huewe Reviewed-by: Jarkko Sakkien /Jarkko > --- > drivers/char/tpm/tpm_tis_spi.c | 40 +++++++++++++++++++++------------------- > 1 file changed, 21 insertions(+), 19 deletions(-) > > diff --git a/drivers/char/tpm/tpm_tis_spi.c b/drivers/char/tpm/tpm_tis_spi.c > index d782b9974c14..16938e2253d2 100644 > --- a/drivers/char/tpm/tpm_tis_spi.c > +++ b/drivers/char/tpm/tpm_tis_spi.c > @@ -60,7 +60,7 @@ static int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u8 len, > u8 *buffer, u8 direction) > { > struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data); > - int ret, i; > + int ret; > struct spi_message m; > struct spi_transfer spi_xfer = { > .tx_buf = phy->tx_buf, > @@ -85,25 +85,27 @@ static int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u8 len, > if (ret < 0) > goto exit; > > - phy->tx_buf[0] = 0; > - > - /* According to TCG PTP specification, if there is no TPM present at > - * all, then the design has a weak pull-up on MISO. If a TPM is not > - * present, a pull-up on MISO means that the SB controller sees a 1, > - * and will latch in 0xFF on the read. > - */ > - for (i = 0; (phy->rx_buf[0] & 0x01) == 0 && i < TPM_RETRY; i++) { > - spi_xfer.len = 1; > - spi_message_init(&m); > - spi_message_add_tail(&spi_xfer, &m); > - ret = spi_sync_locked(phy->spi_device, &m); > - if (ret < 0) > + if ((phy->rx_buf[3] & 0x01) == 0) { > + // handle SPI wait states > + int i; > + > + phy->tx_buf[0] = 0; > + > + for (i = 0; i < TPM_RETRY; i++) { > + spi_xfer.len = 1; > + spi_message_init(&m); > + spi_message_add_tail(&spi_xfer, &m); > + ret = spi_sync_locked(phy->spi_device, &m); > + if (ret < 0) > + goto exit; > + if (phy->rx_buf[0] & 0x01) > + break; > + } > + > + if (i == TPM_RETRY) { > + ret = -ETIMEDOUT; > goto exit; > - } > - > - if (i == TPM_RETRY) { > - ret = -ETIMEDOUT; > - goto exit; > + } > } > > spi_xfer.cs_change = 0; > -- > 2.7.4 >