From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932359AbdCGOMs (ORCPT ); Tue, 7 Mar 2017 09:12:48 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:57896 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755119AbdCGOMl (ORCPT ); Tue, 7 Mar 2017 09:12:41 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 96BC260724 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Tue, 7 Mar 2017 06:11:57 -0800 From: Stephen Boyd To: Maxime Ripard Cc: Mike Turquette , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, Daniel Vetter , David Airlie , Mark Rutland , Rob Herring , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Carlo Caione , Kevin Hilman , Vladimir Zapolskiy , Sylvain Lemieux , Andy Gross , David Brown , Alessandro Zummo , Alexandre Belloni , linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, rtc-linux@googlegroups.com Subject: Re: [PATCH 1/15] clk: divider: Make divider_round_rate take the parent clock Message-ID: <20170307141157.GC10239@codeaurora.org> References: <7ebd073b4941e4b7c619f15ff0a375ff7919d403.1488876832.git-series.maxime.ripard@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7ebd073b4941e4b7c619f15ff0a375ff7919d403.1488876832.git-series.maxime.ripard@free-electrons.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/07, Maxime Ripard wrote: > So far, divider_round_rate only considers the parent clock returned by > clk_hw_get_parent. > > This works fine on clocks that have a single parents, this doesn't work on > muxes, since we will only consider the first parent, while other parents > may totally be able to provide a better combination. > > Clocks in that case cannot use divider_round_rate, so would have to come up > with a very similar logic to work around it. Instead of having to do > something like this, and duplicate that logic everywhere, give an > additional parameter for the parent clock to consider. > > Current users have been converted using the following coccinelle script > > @@ > identifier hw, rate, prate, table, width, flags; > @@ > > -long divider_round_rate(struct clk_hw *hw, > +long divider_round_rate(struct clk_hw *hw, struct clk_hw *parent, > unsigned long rate, > unsigned long *prate, > const struct clk_div_table *table, > u8 width, > unsigned long flags) { ... } > > @@ > identifier fn, hw; > expression E2, E3, E4, E5, E6; > @@ > fn (struct clk_hw *hw, ...) { > <... > -divider_round_rate(hw, E2, E3, E4, E5, E6) > +divider_round_rate(hw, clk_hw_get_parent(hw), E2, E3, E4, E5, E6) > ...> > } Why not introduce another function like divider_round_rate_parent() divider_round_rate_mux() that takes the extra parent argument? Technically, a divider is considered to only have one parent, and if it has more than one parent, then it is a mux and a divider. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project