From: Thierry Reding <thierry.reding@gmail.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Alexandre Courbot <gnurou@gmail.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: tegra: Add sata seq input control
Date: Mon, 20 Mar 2017 14:28:30 +0100 [thread overview]
Message-ID: <20170320132830.GL22463@ulmo.ba.sec> (raw)
In-Reply-To: <1489592525-6231-1-git-send-email-pdeschrijver@nvidia.com>
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On Wed, Mar 15, 2017 at 05:42:05PM +0200, Peter De Schrijver wrote:
> This will be used by the powergating driver to ensure proper sequencer
> state when the SATA domain is powergated.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
> drivers/clk/tegra/clk-tegra210.c | 25 +++++++++++++++++++++++++
> include/linux/clk/tegra.h | 1 +
> 2 files changed, 26 insertions(+)
Applied to for-4.12/clk, thanks.
I assume that somebody will send out patches for the powergate driver?
Thierry
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prev parent reply other threads:[~2017-03-20 13:30 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-15 15:42 [PATCH] clk: tegra: Add sata seq input control Peter De Schrijver
2017-03-20 13:28 ` Thierry Reding [this message]
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