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From: Brian Norris <briannorris@chromium.org>
To: Chris Zhong <zyw@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org,
	Heiko Stuebner <heiko@sntech.de>, David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	Mark Yao <mark.yao@rock-chips.com>
Subject: Re: [PATCH v3 4/4] drm/rockchip/dsi: correct the grf_switch_reg name
Date: Tue, 21 Mar 2017 12:56:00 -0700	[thread overview]
Message-ID: <20170321195557.GA74389@google.com> (raw)
In-Reply-To: <1489722865-22122-5-git-send-email-zyw@rock-chips.com>

On Fri, Mar 17, 2017 at 11:54:24AM +0800, Chris Zhong wrote:
> For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20,
> not RK3399_GRF_SOC_CON19.

Matches the TRM for me, and otherwise it's a no-op:

Reviewed-by: Brian Norris <briannorris@chromium.org>

> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index 5a18281..19b9208 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -34,7 +34,7 @@
>  #define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
>  #define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
>  
> -#define RK3399_GRF_SOC_CON19		0x6250
> +#define RK3399_GRF_SOC_CON20		0x6250
>  #define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
>  #define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
>  
> @@ -1151,7 +1151,7 @@ static struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
>  static struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
>  	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
>  	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
> -	.grf_switch_reg = RK3399_GRF_SOC_CON19,
> +	.grf_switch_reg = RK3399_GRF_SOC_CON20,
>  	.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
>  	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
>  	.flags = DW_MIPI_NEEDS_PHY_CFG_CLK | DW_MIPI_NEEDS_GRF_CLK,
> -- 
> 2.6.3

  reply	other threads:[~2017-03-21 20:04 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-17  3:54 [PATCH v3 0/4] RK3399 dw-mipi-dsi patches Chris Zhong
2017-03-17  3:54 ` [PATCH v3 1/4] drm/rockchip/dsi: check phy_cfg_clk only for RK3399 Chris Zhong
2017-03-21 20:16   ` Sean Paul
2017-03-21 20:29     ` Sean Paul
2017-03-17  3:54 ` [PATCH v3 2/4] dt-bindings: add the grf clock for dw-mipi-dsi Chris Zhong
2017-03-21 20:17   ` Sean Paul
2017-03-21 20:27     ` Sean Paul
2017-03-17  3:54 ` [PATCH v3 3/4] drm/rockchip/dsi: enable the grf clk before writing grf registers Chris Zhong
2017-03-21 20:30   ` Sean Paul
2017-03-17  3:54 ` [PATCH v3 4/4] drm/rockchip/dsi: correct the grf_switch_reg name Chris Zhong
2017-03-21 19:56   ` Brian Norris [this message]
2017-03-21 20:17   ` Sean Paul
2017-03-21 19:56 ` [PATCH v3 0/4] RK3399 dw-mipi-dsi patches Brian Norris

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