From: Anatolij Gustschin <agust@denx.de>
To: matthew.gerlach@linux.intel.com
Cc: atull@kernel.org, moritz.fischer@ettus.com,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com
Subject: Re: [PATCH v5 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.
Date: Tue, 21 Mar 2017 22:04:37 +0100 [thread overview]
Message-ID: <20170321220437.1fa7efaa@crub> (raw)
In-Reply-To: <1489174827-6033-3-git-send-email-matthew.gerlach@linux.intel.com>
Hi Matthew,
On Fri, 10 Mar 2017 11:40:25 -0800
matthew.gerlach@linux.intel.com matthew.gerlach@linux.intel.com wrote:
...
>+int alt_pr_unregister(struct device *dev)
>+{
>+ dev_dbg(dev, "%s\n", __func__);
>+
>+ fpga_mgr_unregister(dev);
>+
>+ return 0;
>+}
>+EXPORT_SYMBOL_GPL(alt_pr_unregister);
Can we also add a function for registering a PCIe device with
PR IP here? Something like:
/**
* alt_pr_pcie_register - register PCIe device with PR-IP core
* @pci_dev: PCI device with PR-IP
* @bar: PR-IP BAR number
* @pr_offset: offset of the PR-IP core registers
*
* Return: 0 on success, negative error code otherwise.
*
* To unregister the PCIe device, use alt_pr_unregister(&pdev->dev).
*/
int alt_pr_pcie_register(struct pci_dev *pdev, int bar, int pr_offset)
{
void __iomem *base;
int ret;
if (!pci_is_enabled(pdev)) {
ret = pci_enable_device(pdev);
if (ret < 0) {
dev_err(&pdev->dev, "can't enable device: %d\n", ret);
return ret;
}
}
base = devm_ioremap_resource(&pdev->dev, &pdev->resource[bar]);
if (IS_ERR(base)) {
dev_warn(&pdev->dev, "mapping PR-IP BAR failed\n");
return -ENOMEM;
}
return alt_pr_register(&pdev->dev, base + pr_offset);
}
EXPORT_SYMBOL_GPL(alt_pr_pcie_register);
Thanks,
Anatolij
next prev parent reply other threads:[~2017-03-21 21:14 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-10 19:40 [PATCH v5 0/4] Altera Partial Reconfiguration IP matthew.gerlach
2017-03-10 19:40 ` [PATCH v5 1/4] fpga: add config complete timeout matthew.gerlach
2017-03-13 20:46 ` Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP matthew.gerlach
2017-03-13 20:49 ` Moritz Fischer
2017-03-18 18:53 ` Anatolij Gustschin
2017-03-20 23:49 ` matthew.gerlach
2017-03-21 21:04 ` Anatolij Gustschin [this message]
2017-03-22 16:08 ` matthew.gerlach
2017-03-22 16:39 ` Anatolij Gustschin
2017-03-10 19:40 ` [PATCH v5 3/4] fpga dt: bindings " matthew.gerlach
2017-03-13 20:47 ` Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 4/4] fpga pr ip: Platform driver " matthew.gerlach
2017-03-13 20:48 ` Moritz Fischer
2017-03-18 18:27 ` Anatolij Gustschin
2017-03-20 23:42 ` matthew.gerlach
2017-03-13 20:46 ` [PATCH v5 0/4] " Moritz Fischer
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