From: Kishon Vijay Abraham I <kishon@ti.com>
To: <gregkh@linuxfoundation.org>
Cc: <kishon@ti.com>, <linux-kernel@vger.kernel.org>
Subject: [PATCH 2/4] Revert "dt-bindings: phy: Add documentation for NSP USB3 PHY"
Date: Wed, 22 Mar 2017 20:30:34 +0530 [thread overview]
Message-ID: <20170322150036.12629-3-kishon@ti.com> (raw)
In-Reply-To: <20170322150036.12629-1-kishon@ti.com>
From: Rafał Miłecki <rafal@milecki.pl>
This reverts commit c8ca631f9480 ("dt-bindings: phy: Add documentation
for NSP USB3 PHY") to match reverting commit adding the new PHY driver.
Please note we revert this commit before it reached stable release.
If new compatible string is needed it should be added to the existing
bcm-ns-usb3-phy.txt which already describes this PHY.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/phy/brcm,nsp-usb3-phy.txt | 39 ----------------------
1 file changed, 39 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
diff --git a/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt b/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
deleted file mode 100644
index e68ae5dec9c9..000000000000
--- a/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-Broadcom USB3 phy binding for northstar plus SoC
-The USB3 phy is internal to the SoC and is accessed using mdio interface.
-
-Required mdio bus properties:
-- reg: Should be 0x0 for SoC internal USB3 phy
-- #address-cells: must be 1
-- #size-cells: must be 0
-
-Required USB3 PHY properties:
-- compatible: should be "brcm,nsp-usb3-phy"
-- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
-- usb3-ctrl-syscon: handler of syscon node defining physical address
- of usb3 control register.
-- #phy-cells: must be 0
-
-Required usb3 control properties:
-- compatible: should be "brcm,nsp-usb3-ctrl"
-- reg: offset and length of the control registers
-
-Example:
-
- mdio@0 {
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- usb3_phy: usb-phy@10 {
- compatible = "brcm,nsp-usb3-phy";
- reg = <0x10>;
- usb3-ctrl-syscon = <&usb3_ctrl>;
- #phy-cells = <0>;
- status = "disabled";
- };
- };
-
- usb3_ctrl: syscon@104408 {
- compatible = "brcm,nsp-usb3-ctrl", "syscon";
- reg = <0x104408 0x3fc>;
- };
--
2.11.0
next prev parent reply other threads:[~2017-03-22 15:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-22 15:00 [GIT PULL] phy: for 4.11 -rc cycle Kishon Vijay Abraham I
2017-03-22 15:00 ` [PATCH 1/4] Revert "phy: Add USB3 PHY support for Broadcom NSP SoC" Kishon Vijay Abraham I
2017-03-22 15:00 ` Kishon Vijay Abraham I [this message]
2017-03-22 15:00 ` [PATCH 3/4] phy: phy-exynos-pcie: fix the wrong error return Kishon Vijay Abraham I
2017-03-22 15:00 ` [PATCH 4/4] phy: qcom-usb-hs: Add depends on EXTCON Kishon Vijay Abraham I
2017-03-23 21:04 ` [GIT PULL] phy: for 4.11 -rc cycle Greg KH
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