From: Andrew Lunn <andrew@lunn.ch>
To: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
kernel@savoirfairelinux.com,
"David S. Miller" <davem@davemloft.net>,
Florian Fainelli <f.fainelli@gmail.com>
Subject: Re: [PATCH net-next 2/9] net: dsa: mv88e6xxx: use 4-bit port for PVT data
Date: Thu, 30 Mar 2017 15:34:23 +0200 [thread overview]
Message-ID: <20170330133423.GB17879@lunn.ch> (raw)
In-Reply-To: <20170329203020.27042-3-vivien.didelot@savoirfairelinux.com>
On Wed, Mar 29, 2017 at 04:30:13PM -0400, Vivien Didelot wrote:
> The Cross-chip Port Based VLAN Table (PVT) supports two indexing modes,
> one using 5-bit for device and 4-bit for port, the other using 4-bit for
> device and 5-bit for port, configured via the Global 2 Misc register.
>
> Only 4 bits for the source port are needed when interconnecting 88E6xxx
> switch devices since they all support less than 16 physical ports. The
> full 5 bits are needed when interconnecting a device with 98DXxxx switch
> devices since they support more than 16 physical ports.
>
> Add a mv88e6xxx_pvt_setup helper to set the 4-bit port PVT mode, which
> will be extended later to also initialize the PVT content.
>
> Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2017-03-30 13:34 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 20:30 [PATCH net-next 0/9] net: dsa: mv88e6xxx: program cross-chip bridging Vivien Didelot
2017-03-29 20:30 ` [PATCH net-next 1/9] net: dsa: mv88e6xxx: move PVT description in info Vivien Didelot
2017-03-30 13:31 ` Andrew Lunn
2017-03-29 20:30 ` [PATCH net-next 2/9] net: dsa: mv88e6xxx: use 4-bit port for PVT data Vivien Didelot
2017-03-30 13:34 ` Andrew Lunn [this message]
2017-03-29 20:30 ` [PATCH net-next 3/9] net: dsa: mv88e6xxx: program the PVT with all ones Vivien Didelot
2017-03-30 13:45 ` Andrew Lunn
2017-03-30 14:16 ` Vivien Didelot
2017-03-29 20:30 ` [PATCH net-next 4/9] net: dsa: mv88e6xxx: allocate the number of ports Vivien Didelot
2017-03-30 13:50 ` Andrew Lunn
2017-03-30 14:06 ` Vivien Didelot
2017-03-29 20:30 ` [PATCH net-next 5/9] net: dsa: mv88e6xxx: rework in-chip bridging Vivien Didelot
2017-03-30 13:57 ` Andrew Lunn
2017-03-29 20:30 ` [PATCH net-next 6/9] net: dsa: mv88e6xxx: factorize in-chip bridge map Vivien Didelot
2017-03-30 14:04 ` Andrew Lunn
2017-03-29 20:30 ` [PATCH net-next 7/9] net: dsa: mv88e6xxx: remap existing bridge members Vivien Didelot
2017-03-30 14:07 ` Andrew Lunn
2017-03-29 20:30 ` [PATCH net-next 8/9] net: dsa: add cross-chip bridging operations Vivien Didelot
2017-03-29 20:30 ` [PATCH net-next 9/9] net: dsa: mv88e6xxx: add cross-chip bridging Vivien Didelot
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