From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752754AbdEQD1C (ORCPT ); Tue, 16 May 2017 23:27:02 -0400 Received: from mail-pg0-f67.google.com ([74.125.83.67]:36728 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752296AbdEQD05 (ORCPT ); Tue, 16 May 2017 23:26:57 -0400 Date: Wed, 17 May 2017 11:26:57 +0800 From: Dong Aisheng To: Andy Shevchenko Cc: Dong Aisheng , "linux-serial@vger.kernel.org" , "linux-kernel@vger.kernel.org" , linux-arm Mailing List , Greg Kroah-Hartman , Jiri Slaby , fugang.duan@nxp.com, Stefan Agner , Mingkai.Hu@nxp.com, yangbo.lu@nxp.com Subject: Re: [PATCH V2 2/6] tty: serial: lpuart: add little endian 32 bit register support Message-ID: <20170517032657.GA9913@b29396-OptiPlex-7040> References: <1494834539-17523-1-git-send-email-aisheng.dong@nxp.com> <1494834539-17523-3-git-send-email-aisheng.dong@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 15, 2017 at 04:36:25PM +0300, Andy Shevchenko wrote: > On Mon, May 15, 2017 at 10:48 AM, Dong Aisheng wrote: > > It's based on the exist lpuart32 read/write implementation. > > Same as per previous comment (perhaps not in other UART driver, but > some might have been using device property for that. > The reason why we do that is: a) we don't want to make a churn on the exist users. b) it's not really necessary to use dt property when we already have a soc_data as it has no much benefit but introduce overhead. Regards Dong Aisheng > > -- > With Best Regards, > Andy Shevchenko