From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751071AbdEaEAV (ORCPT ); Wed, 31 May 2017 00:00:21 -0400 Received: from mail-pf0-f170.google.com ([209.85.192.170]:32933 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751022AbdEaEAS (ORCPT ); Wed, 31 May 2017 00:00:18 -0400 Date: Wed, 31 May 2017 09:30:13 +0530 From: Viresh Kumar To: Leonard Crestez Cc: "Rafael J. Wysocki" , Octavian Purdila , Shawn Guo , Bai Ping , Lucas Stach , Fabio Estevam , linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] cpufreq: imx6q: imx6ull should use the same flow as imx6ul Message-ID: <20170531040013.GA4284@vireshk-i7> References: <30688f5aa17763362275c199b2d61841497c26a4.1496159470.git.leonard.crestez@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <30688f5aa17763362275c199b2d61841497c26a4.1496159470.git.leonard.crestez@nxp.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30-05-17, 18:57, Leonard Crestez wrote: > From: Octavian Purdila > > This fixes an issue with imx6ull where setting the frequency to 528Mhz > would actually set the ARM clock to 324Mhz. > > Signed-off-by: Octavian Purdila > Signed-off-by: Leonard Crestez > --- > drivers/cpufreq/imx6q-cpufreq.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c > index 9c13f09..b6edd3c 100644 > --- a/drivers/cpufreq/imx6q-cpufreq.c > +++ b/drivers/cpufreq/imx6q-cpufreq.c > @@ -101,7 +101,8 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index) > * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it > * - Disable pll2_pfd2_396m_clk > */ > - if (of_machine_is_compatible("fsl,imx6ul")) { > + if (of_machine_is_compatible("fsl,imx6ul") || > + of_machine_is_compatible("fsl,imx6ull")) { > /* > * When changing pll1_sw_clk's parent to pll1_sys_clk, > * CPU may run at higher than 528MHz, this will lead to > @@ -215,7 +216,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) > goto put_clk; > } > > - if (of_machine_is_compatible("fsl,imx6ul")) { > + if (of_machine_is_compatible("fsl,imx6ul") || > + of_machine_is_compatible("fsl,imx6ull")) { > pll2_bus_clk = clk_get(cpu_dev, "pll2_bus"); > secondary_sel_clk = clk_get(cpu_dev, "secondary_sel"); > if (IS_ERR(pll2_bus_clk) || IS_ERR(secondary_sel_clk)) { Acked-by: Viresh Kumar -- viresh