From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752042AbdFUVPJ (ORCPT ); Wed, 21 Jun 2017 17:15:09 -0400 Received: from bh-25.webhostbox.net ([208.91.199.152]:46408 "EHLO bh-25.webhostbox.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751083AbdFUVPD (ORCPT ); Wed, 21 Jun 2017 17:15:03 -0400 Date: Wed, 21 Jun 2017 14:14:56 -0700 From: Guenter Roeck To: Bibby Hsieh Cc: David Airlie , Matthias Brugger , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Cawa Cheng , Mao Huang , CK Hu , Thierry Reding , Philipp Zabel , YT Shen , Yingjoe Chen , Sascha Hauer , linux-arm-kernel@lists.infradead.org Subject: Re: [v2] drm: mediatek: change the variable type of rdma threshold Message-ID: <20170621211456.GA21176@roeck-us.net> References: <1495187843-6882-1-git-send-email-bibby.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1495187843-6882-1-git-send-email-bibby.hsieh@mediatek.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - bh-25.webhostbox.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - roeck-us.net X-Get-Message-Sender-Via: bh-25.webhostbox.net: authenticated_id: guenter@roeck-us.net X-Authenticated-Sender: bh-25.webhostbox.net: guenter@roeck-us.net X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 19, 2017 at 05:57:23PM +0800, Bibby Hsieh wrote: > For some greater resolution, the rdma threshold > variable will overflow. > > Signed-off-by: Bibby Hsieh > --- > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index 0df05f9..9afdcd7 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -37,7 +37,7 @@ > #define DISP_REG_RDMA_FIFO_CON 0x0040 > #define RDMA_FIFO_UNDERFLOW_EN BIT(31) > #define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16) > -#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16) > +#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) (((bytes) / 16) & 0x3ff) I agree with the earlier comment; clamp_val() might be more appropriate here and would avoid unexpected results. > > /** > * struct mtk_disp_rdma - DISP_RDMA driver structure > @@ -109,7 +109,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > unsigned int height, unsigned int vrefresh, > unsigned int bpc) > { > - unsigned int threshold; > + unsigned long long threshold; > unsigned int reg; > > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width); > @@ -121,7 +121,8 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > * output threshold to 6 microseconds with 7/6 overhead to > * account for blanking, and with a pixel depth of 4 bytes: > */ > - threshold = width * height * vrefresh * 4 * 7 / 1000000; > + threshold = (unsigned long long)width * height * vrefresh * > + 4 * 7 / 1000000; This is a 64 bit divide operation. It will result in a build failure if compiled for a 32 bit kernel (eg arm:allmodconfig). ERROR: "__aeabi_uldivmod" [drivers/gpu/drm/mediatek/mediatek-drm.ko] undefined! Guenter