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From: James Hogan <james.hogan@imgtec.com>
To: Karl Beldan <karl.beldan@gmail.com>
Cc: <linux-mips@linux-mips.org>, <linux-kernel@vger.kernel.org>,
	Karl Beldan <karl.beldan+oss@gmail.com>, <stable@vger.kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>,
	Jonas Gorski <jogo@openwrt.org>
Subject: Re: [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot
Date: Tue, 27 Jun 2017 21:31:31 +0100	[thread overview]
Message-ID: <20170627203131.GH31455@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <20170627192216.29364-1-karl.beldan+oss@gmail.com>

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On Tue, Jun 27, 2017 at 07:22:16PM +0000, Karl Beldan wrote:
> In this sequence the 'move' is assumed in the delay slot of the 'beq',
> but head.S is in reorder mode and the former gets pushed one 'nop'
> farther by the assembler.
> 
> The corrected behavior made booting with an UHI supplied dtb erratic.
> 
> Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable")
> Cc: <stable@vger.kernel.org>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Jonas Gorski <jogo@openwrt.org>
> Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>

Ouch, nice catch.

Reviewed-by: James Hogan <james.hogan@imgtec.com>

Cheers
James

> ---
>  arch/mips/kernel/head.S | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
> index cf05220..d1bb506 100644
> --- a/arch/mips/kernel/head.S
> +++ b/arch/mips/kernel/head.S
> @@ -106,8 +106,8 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
>  	beq		t0, t1, dtb_found
>  #endif
>  	li		t1, -2
> -	beq		a0, t1, dtb_found
>  	move		t2, a1
> +	beq		a0, t1, dtb_found
>  
>  	li		t2, 0
>  dtb_found:
> -- 
> 2.10.1
> 
> 

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  reply	other threads:[~2017-06-27 20:31 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-27 19:22 [RESEND PATCH] MIPS: head: Reorder instructions missing a delay slot Karl Beldan
2017-06-27 20:31 ` James Hogan [this message]
2017-06-27 21:40 ` Ralf Baechle

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