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From: Christoph Hellwig <hch@infradead.org>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: yamada.masahiro@socionext.com, mmarek@suse.com,
	will.deacon@arm.com, peterz@infradead.org, boqun.feng@gmail.com,
	mingo@redhat.com, daniel.lezcano@linaro.org, tglx@linutronix.de,
	jason@lakedaemon.net, marc.zyngier@arm.com,
	gregkh@linuxfoundation.org, jslaby@suse.com, davem@davemloft.net,
	mchehab@kernel.org, sfr@canb.auug.org.au, fweisbec@gmail.com,
	viro@zeniv.linux.org.uk, mcgrof@kernel.org, dledford@redhat.com,
	bart.vanassche@sandisk.com, sstabellini@kernel.org,
	daniel.vetter@ffwll.ch, mpe@ellerman.id.au, msalter@redhat.com,
	nicolas.dichtel@6wind.com, james.hogan@imgtec.com,
	paul.gortmaker@windriver.com, linux@roeck-us.net,
	heiko.carstens@de.ibm.com, schwidefsky@de.ibm.com,
	linux-kernel@vger.kernel.org, patches@groups.riscv.org,
	akpm@linux-foundation.org, albert@sifive.com
Subject: Re: [PATCH 16/17] RISC-V: User-facing API
Date: Tue, 11 Jul 2017 06:39:48 -0700	[thread overview]
Message-ID: <20170711133948.GA26995@infradead.org> (raw)
In-Reply-To: <20170711013924.22085-17-palmer@dabbelt.com>

> +++ b/arch/riscv/kernel/sys_riscv.c
> @@ -0,0 +1,43 @@
> +/*
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2014 Darius Rad <darius@bluespec.com>
> + * Copyright (C) 2017 SiFive
> + *
> + *   This program is free software; you can redistribute it and/or
> + *   modify it under the terms of the GNU General Public License
> + *   as published by the Free Software Foundation, version 2.
> + *
> + *   This program is distributed in the hope that it will be useful,
> + *   but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *   GNU General Public License for more details.
> + */
> +
> +#include <linux/syscalls.h>
> +#include <asm/cmpxchg.h>

Should not be needed.

> +#ifdef CONFIG_64BIT
> +SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
> +	unsigned long, prot, unsigned long, flags,
> +	unsigned long, fd, off_t, offset)
> +{
> +	if (unlikely(offset & (~PAGE_MASK)))
> +		return -EINVAL;
> +	return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
> +}
> +#else
> +SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
> +	unsigned long, prot, unsigned long, flags,
> +	unsigned long, fd, off_t, offset)
> +{
> +	/*
> +	 * Note that the shift for mmap2 is constant (12),
> +	 * regardless of PAGE_SIZE
> +	 */
> +	if (unlikely(offset & (~PAGE_MASK >> 12)))
> +		return -EINVAL;
> +	return sys_mmap_pgoff(addr, len, prot, flags, fd,
> +		offset >> (PAGE_SHIFT - 12));
> +}
> +#endif /* !CONFIG_64BIT */

Most modern ports seem to expose sys_mmap_pgoff as the
syscall directly.  Any reason you're doing this differently?

But even the code for the older ones should probably be consolidated..

  reply	other threads:[~2017-07-11 13:41 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-11  1:39 RISC-V Linux Port v5 Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 01/17] lib: Add shared copies of some GCC library routines Palmer Dabbelt
2017-07-11  2:02   ` Stephen Rothwell
2017-07-11  2:03     ` Randy Dunlap
2017-07-11  2:09       ` [patches] " Palmer Dabbelt
2017-07-11  2:13         ` Randy Dunlap
2017-07-11  2:09     ` Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 02/17] pci: Add a generic, weakly-linked pcibios_align_resource Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 03/17] pci: Add a generic, weakly-linked pcibios_fixup_bus Palmer Dabbelt
2017-07-11 18:51   ` Luis R. Rodriguez
2017-07-11  1:39 ` [PATCH 04/17] MAINTAINERS: Add RISC-V Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 05/17] clocksource: New RISC-V SBI timer driver Palmer Dabbelt
2017-07-31 11:00   ` Daniel Lezcano
2017-08-01  1:14     ` Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 06/17] irqchip: RISC-V Local Interrupt Controller Driver Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 07/17] irqchip: New RISC-V PLIC Driver Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 08/17] tty: New RISC-V SBI console driver Palmer Dabbelt
2017-07-11  6:21   ` Michael Ellerman
2017-07-11 16:22     ` Palmer Dabbelt
2017-07-12 11:04       ` Michael Ellerman
2017-07-12 16:24         ` Palmer Dabbelt
2017-07-13 11:59           ` Michael Ellerman
2017-07-13 12:32             ` James Hogan
2017-07-13 21:50               ` Palmer Dabbelt
2017-07-14  5:07                 ` Michael Ellerman
2017-07-11  1:39 ` [PATCH 09/17] RISC-V: Init and Halt Code Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 10/17] RISC-V: Atomic and Locking Code Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 11/17] RISC-V: Generic library routines and assembly Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 12/17] RISC-V: ELF and module implementation Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 13/17] RISC-V: Task implementation Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 14/17] RISC-V: Device, timer, IRQs, and the SBI Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 15/17] RISC-V: Paging and MMU Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 16/17] RISC-V: User-facing API Palmer Dabbelt
2017-07-11 13:39   ` Christoph Hellwig [this message]
2017-07-11 14:01     ` James Hogan
2017-07-11 17:28       ` [patches] " Palmer Dabbelt
2017-07-11  1:39 ` [PATCH 17/17] RISC-V: Build Infastructure Palmer Dabbelt
2017-07-11  6:31   ` Michael Ellerman
2017-07-11 16:22     ` Palmer Dabbelt
2017-07-12 10:44       ` Michael Ellerman
2017-07-11 18:39 ` RISC-V Linux Port v5 Luis R. Rodriguez
2017-07-11 19:50   ` Palmer Dabbelt
  -- strict thread matches above, loose matches on Subject: below --
2017-07-12  1:31 RISC-V Linux Port v6 Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 16/17] RISC-V: User-facing API Palmer Dabbelt
2017-07-12 11:07   ` James Hogan
2017-07-12 16:24     ` Palmer Dabbelt
2017-07-12 17:09       ` James Hogan
2017-07-13 21:50         ` Palmer Dabbelt

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