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From: Borislav Petkov <bp@alien8.de>
To: X86 ML <x86@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH 3/3] x86/mce/AMD: Allow any CPU to initialize smca_banks array
Date: Mon, 24 Jul 2017 12:12:28 +0200	[thread overview]
Message-ID: <20170724101228.17326-4-bp@alien8.de> (raw)
In-Reply-To: <20170724101228.17326-1-bp@alien8.de>

From: Yazen Ghannam <yazen.ghannam@amd.com>

Current SMCA implementations have the same banks on each CPU with the
non-core banks only visible to a "master thread" on each die. Practically,
this means the smca_banks array, which describes the banks, only needs to
be populated once by a single master thread.

CPU 0 seemed like a good candidate to do the populating. However, it's
possible that CPU 0 is not enabled in which case the smca_banks array won't
be populated.

Rather than try to figure out another master thread to do the populating,
we should just allow any CPU to populate the array.

Drop the CPU 0 check and return early if the bank was already initialized.
Also, drop the WARNing about an already initialized bank, since this will
be a common, expected occurrence.

The smca_banks array is only populated at boot time and CPUs are brought
online sequentially. So there's no need for locking around the array.

If the first CPU up is a master thread, then it will populate the array
with all banks, core and non-core. Every CPU afterwards will return
early. If the first CPU up is not a master thread, then it will populate
the array with all core banks. The first CPU afterwards that is a master
thread will skip populating the core banks and continue populating the
non-core banks.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Acked-by: Jack Miller <jack@codezen.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1498759708-27680-1-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 9e314bcf67cc..5ce1a5689162 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -201,8 +201,8 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
 		wrmsr(smca_config, low, high);
 	}
 
-	/* Collect bank_info using CPU 0 for now. */
-	if (cpu)
+	/* Return early if this bank was already initialized. */
+	if (smca_banks[bank].hwid)
 		return;
 
 	if (rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
@@ -216,11 +216,6 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
 	for (i = 0; i < ARRAY_SIZE(smca_hwid_mcatypes); i++) {
 		s_hwid = &smca_hwid_mcatypes[i];
 		if (hwid_mcatype == s_hwid->hwid_mcatype) {
-
-			WARN(smca_banks[bank].hwid,
-			     "Bank %s already initialized!\n",
-			     smca_get_name(s_hwid->bank_type));
-
 			smca_banks[bank].hwid = s_hwid;
 			smca_banks[bank].id = low;
 			smca_banks[bank].sysfs_id = s_hwid->count++;
-- 
2.14.0.rc0

  parent reply	other threads:[~2017-07-24 10:14 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-24 10:12 [PATCH 0/3] x86 stuff for 4.14 Borislav Petkov
2017-07-24 10:12 ` [PATCH 1/3] x86/microcode/AMD: Free unneeded patch before exit from update_cache() Borislav Petkov
2017-07-25 13:50   ` [tip:x86/microcode] " tip-bot for Shu Wang
2017-07-24 10:12 ` [PATCH 2/3] x86/microcode: Document the three loading methods Borislav Petkov
2017-07-25 13:51   ` [tip:x86/microcode] " tip-bot for Borislav Petkov
2017-08-04 11:24     ` Paul Menzel
2017-08-05  6:15       ` Borislav Petkov
2017-07-24 10:12 ` Borislav Petkov [this message]
2017-07-25 13:51   ` [tip:ras/core] x86/mce/AMD: Allow any CPU to initialize the smca_banks array tip-bot for Yazen Ghannam
2017-07-25 13:55   ` tip-bot for Yazen Ghannam

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