From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753979AbdHUSAC (ORCPT ); Mon, 21 Aug 2017 14:00:02 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:34000 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753141AbdHUSAB (ORCPT ); Mon, 21 Aug 2017 14:00:01 -0400 Date: Mon, 21 Aug 2017 19:00:02 +0100 From: Will Deacon To: Peter Zijlstra Cc: Waiman Long , Ingo Molnar , linux-kernel@vger.kernel.org, Pan Xinhui , Boqun Feng , Andrea Parri , Paul McKenney Subject: Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Message-ID: <20170821180001.GA22335@arm.com> References: <945c28c3-5779-c8c8-13bb-40477abd1f0e@redhat.com> <20170810161524.2wzocpcxrliy7nt6@hirez.programming.kicks-ass.net> <7cb318a8-d5b9-0019-a537-1720fc5222cc@redhat.com> <73daa6e6-537e-b0ce-e1e0-7afa75334509@redhat.com> <20170811090601.2owslxi4lgv3kond@hirez.programming.kicks-ass.net> <20170814120121.GA24249@arm.com> <20170814184711.GL6524@worktop.programming.kicks-ass.net> <20170815184034.GD10801@arm.com> <20170821105508.j3p4zv7mdojpyb7e@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170821105508.j3p4zv7mdojpyb7e@hirez.programming.kicks-ass.net> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 21, 2017 at 12:55:08PM +0200, Peter Zijlstra wrote: > On Tue, Aug 15, 2017 at 07:40:35PM +0100, Will Deacon wrote: > > On Mon, Aug 14, 2017 at 08:47:11PM +0200, Peter Zijlstra wrote: > > > On Mon, Aug 14, 2017 at 01:01:22PM +0100, Will Deacon wrote: > > > > Yeah, that's right, you can't use the STXR status flag to create control > > > > dependencies. > > > > > > Just for my elucidation; you can't use it to create a control dependency > > > on the store, but you can use it to create a control dependency on the > > > corresponding load, right? > > > > Hmm, sort of, but I'd say that the reads are really ordered due to > > read-after-read ordering in that case. Control dependencies to loads > > don't give you order. > > No, I meant _from_ the LL load, not _to_ a later load. Sorry, I'm still not following enough to give you a definitive answer on that. Could you give an example, please? These sequences usually run in a loop, so the conditional branch back (based on the status flag) is where the read-after-read comes in. Any control dependencies from the loaded data exist regardless of the status flag. > > > Now, IIRC, we've defined control dependencies as being LOAD->STORE > > > ordering, so in that respect nothing is lost. But maybe we should > > > explicitly mention that if the LOAD is part of an (otherwise) atomic RmW > > > the STORE is not constrained. > > > > I could well be misreading your suggestion, but it feels like that's too > > weak. You can definitely still have control dependencies off the LL part > > of the LL/SC pair, just not off the SC part. > > > > E.g. this version of LB is forbidden on arm64: > > > > P0: > > if (atomic_inc_return_relaxed(&x) == 2) > > atomic_set(&y, 1); > > > > P1: > > if (atomic_inc_return_relaxed(&y) == 2) > > atomic_set(&x, 1); > > > > Perhaps when you say "the STORE", you mean the store in the atomic RmW, > > rather than the store in the LOAD->STORE control dependency? > > Yes. So I was looking to exclude (SC) STORE -> STORE order through > control dependencies. Ok, good. Will