From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752652AbdHVWnQ (ORCPT ); Tue, 22 Aug 2017 18:43:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33326 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752247AbdHVWnP (ORCPT ); Tue, 22 Aug 2017 18:43:15 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com EE750356D0 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=alex.williamson@redhat.com Date: Tue, 22 Aug 2017 16:43:12 -0600 From: Alex Williamson To: Bjorn Helgaas Cc: linux-pci@vger.kernel.org, bhelgaas@google.com, eric.auger@redhat.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH] PCI: Fix and amend express capability sizes Message-ID: <20170822164312.302874c6@w520.home> In-Reply-To: <20170822210501.GI6948@bhelgaas-glaptop.roam.corp.google.com> References: <20170810165403.2968.49940.stgit@gimli.home> <20170822210501.GI6948@bhelgaas-glaptop.roam.corp.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 22 Aug 2017 22:43:15 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 22 Aug 2017 16:05:01 -0500 Bjorn Helgaas wrote: > On Thu, Aug 10, 2017 at 10:54:31AM -0600, Alex Williamson wrote: > > PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 defines the size of the PCIe express > > capability structure for v1 devices with link, but we also have a need > > in the vfio code for sizing the capability for devices without link, > > such as root complex endpoints. Create a separate define for this > > ending the structure before the link fields. > > > > Additionally, this reveals that PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 is > > currently incorrect, ending the capability length before the v2 link > > fields. Rename this to specify an RC endpoint (no link) capability > > length and move PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 to include the link > > fields as we have for the v1 version. > > > > Signed-off-by: Alex Williamson > > Applied with Eric's reviewed-by to pci/misc for v4.14, thanks! > > I think there was an underscore missing here: > > > -#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */ > > +#define PCI_CAP_EXP_RC ENDPOINT_SIZEOF_V2 44 /* v2 endpoints without link end here */ Urgh, not sure how that happened. Thanks for the fixup! Alex