From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1753908AbdIDQZr (ORCPT <rfc822;w@1wt.eu>);
        Mon, 4 Sep 2017 12:25:47 -0400
Received: from atrey.karlin.mff.cuni.cz ([195.113.26.193]:47103 "EHLO
        atrey.karlin.mff.cuni.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1753847AbdIDQZq (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 4 Sep 2017 12:25:46 -0400
Date: Mon, 4 Sep 2017 18:25:44 +0200
From: Pavel Machek <pavel@ucw.cz>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Vincent Guittot <vincent.guittot@linaro.org>,
        Mark Brown <broonie@kernel.org>, Stephen Boyd <sboyd@codeaurora.org>,
        Rajendra Nayak <rnayak@codeaurora.org>,
        Shiraz Hashim <shashim@codeaurora.org>, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, robdclark@gmail.com
Subject: Re: [PATCH V3 8/8] drivers: boot_constraint: Add Qualcomm display
 controller constraints
Message-ID: <20170904162544.GA21849@amd>
References: <cover.1501578037.git.viresh.kumar@linaro.org>
 <f1d035bb3202dd6135e6cde9e4a142ea32a6a79c.1501578037.git.viresh.kumar@linaro.org>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha1;
        protocol="application/pgp-signature"; boundary="UugvWAfsgieZRqgk"
Content-Disposition: inline
In-Reply-To: <f1d035bb3202dd6135e6cde9e4a142ea32a6a79c.1501578037.git.viresh.kumar@linaro.org>
User-Agent: Mutt/1.5.23 (2014-03-12)
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org


--UugvWAfsgieZRqgk
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

Hi!

> From: Rajendra Nayak <rnayak@codeaurora.org>
>=20
> NOT TO BE MERGED
>=20
> This sets boot constraints for the display controller used on Qualcomm
> dragonboard 410c.
>=20
> Not-signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> Not-signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

> +#include <linux/boot_constraint.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +
> +struct dev_boot_constraint_clk_info iface_clk_info =3D {
> +	.name =3D "iface_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info bus_clk_info =3D {
> +	.name =3D "bus_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info core_clk_info =3D {
> +	.name =3D "core_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info vsync_clk_info =3D {
> +	.name =3D "vsync_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info esc0_clk_info =3D {
> +	.name =3D "core_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info byte_clk_info =3D {
> +	.name =3D "byte_clk",
> +};
> +
> +struct dev_boot_constraint_clk_info pixel_clk_info =3D {
> +	.name =3D "pixel_clk",
> +};
> +
> +struct dev_boot_constraint_supply_info vdda_info =3D {
> +	.name =3D "vdda"
> +};
> +
> +struct dev_boot_constraint_supply_info vddio_info =3D {
> +	.name =3D "vddio"
> +};
> +
> +struct dev_boot_constraint constraints_mdss[] =3D {
> +	{
> +		.type =3D DEV_BOOT_CONSTRAINT_PM,
> +		.data =3D NULL,
> +	},
> +};
> +
> +struct dev_boot_constraint constraints_mdp[] =3D {
> +	{
> +		.type =3D DEV_BOOT_CONSTRAINT_CLK,
> +		.data =3D &iface_clk_info,
> +	}, {
> +		.type =3D DEV_BOOT_CONSTRAINT_CLK,
> +		.data =3D &bus_clk_info,
> +	}, {
> +		.type =3D DEV_BOOT_CONSTRAINT_CLK,
> +		.data =3D &core_clk_info,
> +	}, {
> +		.type =3D DEV_BOOT_CONSTRAINT_CLK,
> +		.data =3D &vsync_clk_info,
> +	},
> +};

Hmm. I know this is not for merge, but should this go to device tree somewh=
ere?


--=20
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blo=
g.html

--UugvWAfsgieZRqgk
Content-Type: application/pgp-signature; name="signature.asc"
Content-Description: Digital signature

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1

iEYEARECAAYFAlmtfogACgkQMOfwapXb+vLmHACdGFti6tpFO319cbl4Jpvn8HCl
kHUAoKmcWSKlm0xr8G1PT9shs1k/OQYN
=rAMh
-----END PGP SIGNATURE-----

--UugvWAfsgieZRqgk--