From: Thierry Reding <thierry.reding@gmail.com>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org,
jonathanh@nvidia.com, linux-mmc@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mmc: tegra: Mark 64 bit dma broken on Tegra186
Date: Fri, 8 Sep 2017 23:59:22 +0200 [thread overview]
Message-ID: <20170908215636.GA4996@aiwendil> (raw)
In-Reply-To: <1504900113-8983-1-git-send-email-vdumpa@nvidia.com>
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On Fri, Sep 08, 2017 at 12:48:33PM -0700, Krishna Reddy wrote:
> SDHCI controllers on Tegra186 support 40 bit addressing.
> IOVA addresses are 48-bit wide on Tegra186.
> SDHCI host common code sets dma mask as either 32-bit or 64-bit.
> To avoid access issues when SMMU is enabled, disable 64-bit dma.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> drivers/mmc/host/sdhci-tegra.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
This matches a local commit:
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
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next prev parent reply other threads:[~2017-09-08 22:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-08 19:48 [PATCH] mmc: tegra: Mark 64 bit dma broken on Tegra186 Krishna Reddy
2017-09-08 21:59 ` Thierry Reding [this message]
2017-09-11 5:47 ` Adrian Hunter
2017-09-22 9:45 ` Ulf Hansson
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