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Date: Fri, 15 Sep 2017 12:31:45 +0300
From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Nicolin Chen <nicoleotsuka@gmail.com>
CC: <linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
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Subject: Re: [PATCH] clk: tegra: Use readl_relaxed_poll_timeout_atomic in
 tegra210_clock_init
Message-ID: <20170915093145.GD6290@tbergstrom-lnx.Nvidia.com>
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Apart from the typo in the commit message (preemption rather than preemtion):

Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>

On Thu, Sep 14, 2017 at 06:36:14PM -0700, Nicolin Chen wrote:
> Below is the call trace of tegra210_init_pllu() function:
>   start_kernel()
>   -> time_init()
>   --> of_clk_init()
>   ---> tegra210_clock_init()
>   ----> tegra210_pll_init()
>   -----> tegra210_init_pllu()
> 
> Because the preemtion is disabled in the start_kernel before calling
> time_init, tegra210_init_pllu is actually in an atomic context while
> it includes a readl_relaxed_poll_timeout that might sleep.
> 
> So this patch just changes this readl_relaxed_poll_timeout() to its
> atomic version.
> 
> Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
> ---
>  drivers/clk/tegra/clk-tegra210.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
> index 0b9789a..ea695c4 100644
> --- a/drivers/clk/tegra/clk-tegra210.c
> +++ b/drivers/clk/tegra/clk-tegra210.c
> @@ -2587,8 +2587,8 @@ static int tegra210_enable_pllu(void)
>  	reg |= PLL_ENABLE;
>  	writel(reg, clk_base + PLLU_BASE);
>  
> -	readl_relaxed_poll_timeout(clk_base + PLLU_BASE, reg,
> -				   reg & PLL_BASE_LOCK, 2, 1000);
> +	readl_relaxed_poll_timeout_atomic(clk_base + PLLU_BASE, reg,
> +					  reg & PLL_BASE_LOCK, 2, 1000);
>  	if (!(reg & PLL_BASE_LOCK)) {
>  		pr_err("Timed out waiting for PLL_U to lock\n");
>  		return -ETIMEDOUT;
> -- 
> 2.1.4
>