Re: [PATCH v1 2/2] dt-binding: timer: document NPCM7xx timer DT bindings

Tomer Maimon
2017-10-29T20:49:38Z

Sorry for the delay,

On 10 October 2017 at 17:57, Rob Herring <robh@kernel.org> wrote:
> On Sun, Oct 01, 2017 at 12:11:38PM +0300, Tomer Maimon wrote:
>> Added device tree binding documentation for Nuvoton NPCM7xx timer.
>>
>> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
>> ---
>> .../bindings/timer/nuvoton,npcm7xx-timer.txt | 25 ++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
>>
>> diff --git a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
>> new file mode 100644
>> index 000000000000..d1beea901509
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
>> @@ -0,0 +1,25 @@
>> +Nuvoton NPCM7xx timer
>> +
>> +Nuvoton NPCM7xx have three timer modules, each timer module provides five 24-bit
>> +timer counters.
>> +
>> +Required properties:
>> +- compatible : "nuvoton,npcm7xx-timer" for Poleg NPCM7xx.
>
> Don't use wildcards in compatible strings. Use SoC specific compatible
> strings with a fallback (the string for the 1st SoC which the block
> appeared) if necessary.
>
The SOC NPCM7xx is now on upstream process, I asked Brendan to modify
the NPCM7xx device tree to support the clock source driver

https://www.spinics.net/lists/arm-kernel/msg614424.html

and also the arcitecture name

https://www.spinics.net/lists/arm-kernel/msg614059.html

>> +- reg : Offset and length of the register set for the device.
>> +- interrupts : Contain the timer interrupt with flags for
>> + falling edge.
>> +
>> +Required clocking property, have to be one of:
>> +- clocks : phandle of timer reference clock.
>> +- clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx
>> + timer (usually 25000000).
>> +
>> +Example:
>> +
>> +timer@f0008000 {
>> + compatible = "nuvoton,npcm7xx-timer";
>> + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> + reg = <0xf0008000 0x1000>;
>> + clocks = <&clk NPCM7XX_CLK_TIMER>;
>> +};
>> +
>> --
>> 2.14.1
>>