From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751724AbdJNHx7 (ORCPT ); Sat, 14 Oct 2017 03:53:59 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:45519 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750970AbdJNHx6 (ORCPT ); Sat, 14 Oct 2017 03:53:58 -0400 Date: Sat, 14 Oct 2017 09:53:55 +0200 From: Boris Brezillon To: Eric Anholt Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] drm/vc4: Fix sleeps during the IRQ handler for DSI transactions. Message-ID: <20171014095355.0d9945c9@bbrezillon> In-Reply-To: <20171014001255.32005-1-eric@anholt.net> References: <20171014001255.32005-1-eric@anholt.net> X-Mailer: Claws Mail 3.14.1 (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 13 Oct 2017 17:12:55 -0700 Eric Anholt wrote: > VC4's DSI1 has a bug where the AXI connection is broken for 32-bit > writes from the CPU, so we use the DMA engine to DMA 32-bit values > into registers instead. That sleeps, so we can't do it from the top > half. > > As a solution, use an interrupt thread so that all our writes happen > when sleeping is is allowed. > > v2: Use IRQF_ONESHOT (suggested by Boris) > > Signed-off-by: Eric Anholt Reviewed-by: Boris Brezillon > --- > > Boris, that cleanup ended up working and it looks great. Thanks! > > drivers/gpu/drm/vc4/vc4_dsi.c | 31 +++++++++++++++++++++++++++++-- > 1 file changed, 29 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c > index 554605af344e..3b74fda5662d 100644 > --- a/drivers/gpu/drm/vc4/vc4_dsi.c > +++ b/drivers/gpu/drm/vc4/vc4_dsi.c > @@ -1360,6 +1360,25 @@ static void dsi_handle_error(struct vc4_dsi *dsi, > *ret = IRQ_HANDLED; > } > > +/* Initial handler for port 1 where we need the reg_dma workaround. > + * The register DMA writes sleep, so we can't do it in the top half. > + * Instead we use IRQF_ONESHOT so that the IRQ gets disabled in the > + * parent interrupt contrller until our interrupt thread is done. > + */ > +static irqreturn_t vc4_dsi_irq_defer_to_thread_handler(int irq, void *data) > +{ > + struct vc4_dsi *dsi = data; > + u32 stat = DSI_PORT_READ(INT_STAT); > + > + if (!stat) > + return IRQ_NONE; > + > + return IRQ_WAKE_THREAD; > +} > + > +/* Normal IRQ handler for port 0, or the threaded IRQ handler for port > + * 1 where we need the reg_dma workaround. > + */ > static irqreturn_t vc4_dsi_irq_handler(int irq, void *data) > { > struct vc4_dsi *dsi = data; > @@ -1539,8 +1558,16 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) > /* Clear any existing interrupt state. */ > DSI_PORT_WRITE(INT_STAT, DSI_PORT_READ(INT_STAT)); > > - ret = devm_request_irq(dev, platform_get_irq(pdev, 0), > - vc4_dsi_irq_handler, 0, "vc4 dsi", dsi); > + if (dsi->reg_dma_mem) { > + ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), > + vc4_dsi_irq_defer_to_thread_handler, > + vc4_dsi_irq_handler, > + IRQF_ONESHOT, > + "vc4 dsi", dsi); > + } else { > + ret = devm_request_irq(dev, platform_get_irq(pdev, 0), > + vc4_dsi_irq_handler, 0, "vc4 dsi", dsi); > + } > if (ret) { > if (ret != -EPROBE_DEFER) > dev_err(dev, "Failed to get interrupt: %d\n", ret);