public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Brijesh Singh <brijesh.singh@amd.com>
To: kvm@vger.kernel.org
Cc: bp@alien8.de, "Brijesh Singh" <brijesh.singh@amd.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Joerg Roedel" <joro@8bytes.org>, "Borislav Petkov" <bp@suse.de>,
	"Tom Lendacky" <thomas.lendacky@amd.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [Part2 PATCH v6 33/38] KVM: SVM: Add support for SEV DEBUG_ENCRYPT command
Date: Thu, 19 Oct 2017 21:34:08 -0500	[thread overview]
Message-ID: <20171020023413.122280-34-brijesh.singh@amd.com> (raw)
In-Reply-To: <20171020023413.122280-1-brijesh.singh@amd.com>

The command copies a plaintext into guest memory and encrypts it using
the VM encryption key. The command will be used for debug purposes
(e.g setting breakpoints through gdbserver)

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: x86@kernel.org
Cc: kvm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
 arch/x86/kvm/svm.c | 119 ++++++++++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 114 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index f19c4fb2fdc8..a91eae7b9c80 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -6122,6 +6122,99 @@ static int __sev_dbg_decrypt(struct kvm *kvm, unsigned long paddr,
 	return ret;
 }
 
+static int __sev_dbg_encrypt(struct kvm *kvm, unsigned long __user vaddr,
+			     unsigned long paddr, unsigned long __user dst_vaddr,
+			     unsigned long dst_paddr, int size, int *error)
+{
+	struct page *src_tpage = NULL;
+	struct page *dst_tpage = NULL;
+	int ret, len = size;
+
+	/*
+	 *  If source buffer is not 16-byte aligned then we copy the data from
+	 *  source buffer into a PAGE aligned intermediate (src_tpage) buffer
+	 *  and use this intermediate buffer as source buffer.
+	 */
+	if (!IS_ALIGNED(vaddr, 16)) {
+		src_tpage = alloc_page(GFP_KERNEL);
+		if (!src_tpage)
+			return -ENOMEM;
+
+		if (copy_from_user(page_address(src_tpage),
+			(void __user *)(uintptr_t)vaddr, size)) {
+			__free_page(src_tpage);
+			return -EFAULT;
+		}
+		paddr = __sme_page_pa(src_tpage);
+
+		clflush_cache_range(page_address(src_tpage), PAGE_SIZE);
+	}
+
+	/*
+	 *  If destination buffer or length is not 16-byte aligned then:
+	 *   - decrypt portion of destination buffer into intermediate buffer
+	 *     (dst_tpage)
+	 *   - copy the source data into intermediate buffer
+	 *   - use the intermediate buffer as source buffer
+	 */
+	if (!IS_ALIGNED(dst_vaddr, 16) ||
+	    !IS_ALIGNED(size, 16)) {
+		int dst_offset;
+
+		dst_tpage = alloc_page(GFP_KERNEL);
+		if (!dst_tpage) {
+			ret = -ENOMEM;
+			goto e_free;
+		}
+
+		/* decrypt destination buffer into intermediate buffer */
+		ret = __sev_dbg_decrypt(kvm,
+					round_down(dst_paddr, 16),
+					0,
+					(unsigned long)page_address(dst_tpage),
+					__sme_page_pa(dst_tpage),
+					round_up(size, 16),
+					error);
+		if (ret)
+			goto e_free;
+
+		dst_offset = dst_paddr & 15;
+
+		/*
+		 * modify the intermediate buffer with data from source buffer.
+		 */
+		if (src_tpage)
+			memcpy(page_address(dst_tpage) + dst_offset,
+			       page_address(src_tpage), size);
+		else {
+			if (copy_from_user(page_address(dst_tpage) + dst_offset,
+					   (void __user *)(uintptr_t)vaddr, size)) {
+				ret = -EFAULT;
+				goto e_free;
+			}
+		}
+
+
+		/* use intermediate buffer as source */
+		paddr = __sme_page_pa(dst_tpage);
+
+		clflush_cache_range(page_address(dst_tpage), PAGE_SIZE);
+
+		/* now we have length and destination buffer aligned */
+		dst_paddr = round_down(dst_paddr, 16);
+		len = round_up(size, 16);
+	}
+
+	ret = __sev_issue_dbg_cmd(kvm, paddr, dst_paddr, len, error, true);
+
+e_free:
+	if (src_tpage)
+		__free_page(src_tpage);
+	if (dst_tpage)
+		__free_page(dst_tpage);
+	return ret;
+}
+
 static int sev_dbg_crypt(struct kvm *kvm, struct kvm_sev_cmd *argp, bool dec)
 {
 	unsigned long vaddr, vaddr_end, next_vaddr;
@@ -6174,11 +6267,19 @@ static int sev_dbg_crypt(struct kvm *kvm, struct kvm_sev_cmd *argp, bool dec)
 		d_off = dst_vaddr & ~PAGE_MASK;
 		len = min_t(size_t, (PAGE_SIZE - s_off), size);
 
-		ret = __sev_dbg_decrypt(kvm,
-				       __sme_page_pa(src_p[0]) + s_off,
-				       dst_vaddr, 0,
-				       __sme_page_pa(dst_p[0]) + d_off,
-				       len, &argp->error);
+		if (dec)
+			ret = __sev_dbg_decrypt(kvm,
+						__sme_page_pa(src_p[0]) + s_off,
+						dst_vaddr, 0,
+						__sme_page_pa(dst_p[0]) + d_off,
+						len, &argp->error);
+		else
+			ret = __sev_dbg_encrypt(kvm,
+						vaddr,
+						__sme_page_pa(src_p[0]) + s_off,
+						dst_vaddr,
+						__sme_page_pa(dst_p[0]) + d_off,
+						len, &argp->error);
 
 		sev_unpin_memory(kvm, src_p, 1);
 		sev_unpin_memory(kvm, dst_p, 1);
@@ -6199,6 +6300,11 @@ static int sev_dbg_decrypt(struct kvm *kvm, struct kvm_sev_cmd *argp)
 	return sev_dbg_crypt(kvm, argp, true);
 }
 
+static int sev_dbg_encrypt(struct kvm *kvm, struct kvm_sev_cmd *argp)
+{
+	return sev_dbg_crypt(kvm, argp, false);
+}
+
 static int svm_mem_enc_op(struct kvm *kvm, void __user *argp)
 {
 	struct kvm_sev_cmd sev_cmd;
@@ -6234,6 +6340,9 @@ static int svm_mem_enc_op(struct kvm *kvm, void __user *argp)
 	case KVM_SEV_DBG_DECRYPT:
 		r = sev_dbg_decrypt(kvm, &sev_cmd);
 		break;
+	case KVM_SEV_DBG_ENCRYPT:
+		r = sev_dbg_encrypt(kvm, &sev_cmd);
+		break;
 	default:
 		r = -EINVAL;
 		goto out;
-- 
2.9.5

  parent reply	other threads:[~2017-10-20  2:38 UTC|newest]

Thread overview: 109+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-20  2:33 [Part2 PATCH v6 00/38] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 01/38] Documentation/virtual/kvm: Add AMD Secure Encrypted Virtualization (SEV) Brijesh Singh
2017-10-20 13:18   ` Jonathan Corbet
2017-10-23 22:40     ` Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 02/38] x86/CPU/AMD: Add the Secure Encrypted Virtualization CPU feature Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 03/38] kvm: svm: prepare for new bit definition in nested_ctl Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 04/38] kvm: svm: Add SEV feature definitions to KVM Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 05/38] KVM: SVM: Prepare to reserve asid for SEV guest Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 06/38] KVM: X86: Extend CPUID range to include new leaf Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 07/38] KVM: Introduce KVM_MEMORY_ENCRYPT_OP ioctl Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 08/38] KVM: Introduce KVM_MEMORY_ENCRYPT_{UN,}REG_REGION ioctl Brijesh Singh
2017-10-20 15:00   ` Borislav Petkov
2017-10-20  2:33 ` [Part2 PATCH v6 10/38] crypto: ccp: Define SEV userspace ioctl and command id Brijesh Singh
2017-10-24 18:40   ` Gary R Hook
2017-10-20  2:33 ` [Part2 PATCH v6 11/38] crypto: ccp: Define SEV key management " Brijesh Singh
2017-10-24 18:40   ` Gary R Hook
2017-10-20  2:33 ` [Part2 PATCH v6 12/38] crypto: ccp: Add Platform Security Processor (PSP) device support Brijesh Singh
2017-10-24 18:40   ` Gary R Hook
2017-10-20  2:33 ` [Part2 PATCH v6 13/38] crypto: ccp: Add Secure Encrypted Virtualization (SEV) command support Brijesh Singh
2017-10-23  7:34   ` Borislav Petkov
2017-10-23 20:05     ` Brijesh Singh
2017-10-23  9:20   ` Borislav Petkov
2017-10-23 19:57     ` Brijesh Singh
2017-10-26 13:56       ` Borislav Petkov
2017-10-26 16:56         ` Brijesh Singh
2017-10-26 17:44           ` Borislav Petkov
2017-10-26 19:26             ` Brijesh Singh
2017-10-26 20:13               ` Borislav Petkov
2017-10-26 20:59                 ` Brijesh Singh
2017-10-27  7:56                   ` Borislav Petkov
2017-10-27 11:28                     ` Brijesh Singh
2017-10-27 20:15                       ` Borislav Petkov
2017-10-27 20:25                         ` Brijesh Singh
2017-10-27 20:27                           ` Borislav Petkov
2017-10-27 21:28                             ` Brijesh Singh
2017-10-27 21:49                               ` Borislav Petkov
2017-10-27 22:59                                 ` Brijesh Singh
2017-10-28  0:00                                   ` Borislav Petkov
2017-10-28 12:20                                     ` Brijesh Singh
2017-10-29 20:48   ` [Part2 PATCH v6.1 16/38] " Brijesh Singh
2017-10-29 21:14     ` Brijesh Singh
2017-10-30 17:21     ` Borislav Petkov
2017-10-30 17:49       ` Brijesh Singh
2017-10-30 17:57         ` Borislav Petkov
2017-10-31  1:29           ` Brijesh Singh
2017-10-31 10:39             ` Borislav Petkov
2017-10-20  2:33 ` [Part2 PATCH v6 14/38] crypto: ccp: Implement SEV_FACTORY_RESET ioctl command Brijesh Singh
2017-10-23  7:42   ` Borislav Petkov
2017-10-24 18:41   ` Gary R Hook
2017-10-29 21:16   ` [Part2 PATCH v6.1 " Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 15/38] crypto: ccp: Implement SEV_PLATFORM_STATUS " Brijesh Singh
2017-10-23  8:48   ` Borislav Petkov
2017-10-24 18:41   ` Gary R Hook
2017-10-30  3:13   ` [Part2 PATCH v6.1 15/38] crypto: ccp: Implement SEV_PEK_GEN " Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 16/38] " Brijesh Singh
2017-10-23  9:32   ` Borislav Petkov
2017-10-23 12:15     ` Brijesh Singh
2017-10-23 12:32       ` Borislav Petkov
2017-10-23 13:32         ` Brijesh Singh
2017-10-23 14:10           ` Borislav Petkov
2017-10-23 20:00             ` Brijesh Singh
2017-10-23 21:55   ` [Part2 PATCH v6.1 " Brijesh Singh
2017-10-24 18:42     ` Gary R Hook
2017-10-26 14:22     ` Borislav Petkov
2017-10-20  2:33 ` [Part2 PATCH v6 17/38] crypto: ccp: Implement SEV_PDH_GEN " Brijesh Singh
2017-10-23 12:35   ` Borislav Petkov
2017-10-24 18:41   ` Gary R Hook
2017-10-20  2:33 ` [Part2 PATCH v6 18/38] crypto: ccp: Implement SEV_PEK_CSR " Brijesh Singh
2017-10-23 12:49   ` Borislav Petkov
2017-10-23 22:10   ` [Part2 PATCH v6.1 " Brijesh Singh
2017-10-24 18:42     ` Gary R Hook
2017-10-30  3:23     ` [Part2 PATCH v6.2 " Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 19/38] crypto: ccp: Implement SEV_PEK_CERT_IMPORT " Brijesh Singh
2017-10-23 22:14   ` [Part2 PATCH v6.1 " Brijesh Singh
2017-10-24 18:42     ` Gary R Hook
2017-10-20  2:33 ` [Part2 PATCH v6 20/38] crypto: ccp: Implement SEV_PDH_CERT_EXPORT " Brijesh Singh
2017-10-23 22:19   ` [Part2 PATCH v6.1 " Brijesh Singh
2017-10-24 18:43     ` Gary R Hook
2017-10-20  2:33 ` [Part2 PATCH v6 21/38] KVM: X86: Add CONFIG_KVM_AMD_SEV Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 22/38] KVM: SVM: Add sev module_param Brijesh Singh
2017-10-20  2:33 ` [Part2 PATCH v6 23/38] KVM: SVM: Reserve ASID range for SEV guest Brijesh Singh
2017-10-27 20:23   ` Borislav Petkov
2017-10-20  2:33 ` [Part2 PATCH v6 24/38] KVM: Define SEV key management command id Brijesh Singh
2017-10-27 20:23   ` Borislav Petkov
2017-10-20  2:34 ` [Part2 PATCH v6 25/38] KVM: SVM: Add KVM_SEV_INIT command Brijesh Singh
2017-10-27 20:24   ` Borislav Petkov
2017-10-30 11:49     ` Brijesh Singh
2017-10-20  2:34 ` [Part2 PATCH v6 26/38] KVM: SVM: VMRUN should use assosiated ASID when SEV is enabled Brijesh Singh
2017-10-20  2:34 ` [Part2 PATCH v6 27/38] KVM: SVM: Add support for KVM_SEV_LAUNCH_START command Brijesh Singh
2017-10-20  2:34 ` [Part2 PATCH v6 28/38] KVM: SVM: Add support for KVM_SEV_LAUNCH_UPDATE_DATA command Brijesh Singh
2017-10-27 20:24   ` Borislav Petkov
2017-10-20  2:34 ` [Part2 PATCH v6 29/38] KVM: SVM: Add support for KVM_SEV_LAUNCH_MEASURE command Brijesh Singh
2017-10-27 20:24   ` Borislav Petkov
2017-10-20  2:34 ` [Part2 PATCH v6 30/38] KVM: SVM: Add support for SEV LAUNCH_FINISH command Brijesh Singh
2017-10-27 20:25   ` Borislav Petkov
2017-10-20  2:34 ` [Part2 PATCH v6 31/38] KVM: SVM: Add support for SEV GUEST_STATUS command Brijesh Singh
2017-10-27 20:25   ` Borislav Petkov
2017-10-20  2:34 ` [Part2 PATCH v6 32/38] KVM: SVM: Add support for SEV DEBUG_DECRYPT command Brijesh Singh
2017-10-27 20:25   ` Borislav Petkov
2017-10-30 13:56     ` Brijesh Singh
2017-10-30 15:12       ` Borislav Petkov
2017-10-30 16:33         ` Brijesh Singh
2017-10-20  2:34 ` Brijesh Singh [this message]
2017-10-20  2:34 ` [Part2 PATCH v6 34/38] KVM: SVM: Add support for SEV LAUNCH_SECRET command Brijesh Singh
2017-10-20  2:34 ` [Part2 PATCH v6 35/38] KVM: SVM: Pin guest memory when SEV is active Brijesh Singh
2017-10-20  2:34 ` [Part2 PATCH v6 36/38] KVM: SVM: Clear C-bit from the page fault address Brijesh Singh
2017-10-20  2:34 ` [Part2 PATCH v6 37/38] KVM: SVM: Do not install #UD intercept when SEV is enabled Brijesh Singh
2017-10-20  2:34 ` [Part2 PATCH v6 38/38] KVM: X86: Restart the guest when insn_len is zero and " Brijesh Singh
2017-10-23 22:07 ` [Part2 PATCH v6.1 18/38] crypto: ccp: Implement SEV_PEK_CSR ioctl command Brijesh Singh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171020023413.122280-34-brijesh.singh@amd.com \
    --to=brijesh.singh@amd.com \
    --cc=bp@alien8.de \
    --cc=bp@suse.de \
    --cc=hpa@zytor.com \
    --cc=joro@8bytes.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=rkrcmar@redhat.com \
    --cc=tglx@linutronix.de \
    --cc=thomas.lendacky@amd.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox