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From: Brijesh Singh <brijesh.singh@amd.com>
To: x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Borislav Petkov <bp@alien8.de>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	Borislav Petkov <bp@suse.de>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	David Laight <David.Laight@ACULAB.COM>,
	Arnd Bergmann <arnd@arndb.de>
Subject: [Part1 PATCH v7 13/17] x86/io: Unroll string I/O when SEV is active
Date: Fri, 20 Oct 2017 09:30:55 -0500	[thread overview]
Message-ID: <20171020143059.3291-14-brijesh.singh@amd.com> (raw)
In-Reply-To: <20171020143059.3291-1-brijesh.singh@amd.com>

From: Tom Lendacky <thomas.lendacky@amd.com>

Secure Encrypted Virtualization (SEV) does not support string I/O, so
unroll the string I/O operation into a loop operating on one element at
a time.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Borislav Petkov <bp@suse.de>
Tested-by: Borislav Petkov <bp@suse.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David Laight <David.Laight@ACULAB.COM>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: x86@kernel.org
Cc: linux-kernel@vger.kernel.org
---
 arch/x86/include/asm/io.h | 43 +++++++++++++++++++++++++++++++++++++++----
 arch/x86/mm/mem_encrypt.c |  8 ++++++++
 2 files changed, 47 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index c40a95c33bb8..b8b8c2e3fb36 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -265,6 +265,21 @@ static inline void slow_down_io(void)
 
 #endif
 
+#ifdef CONFIG_AMD_MEM_ENCRYPT
+#include <linux/jump_label.h>
+
+extern struct static_key_false __sev;
+static inline bool sev_key_active(void)
+{
+	return static_branch_unlikely(&__sev);
+}
+
+#else /* !CONFIG_AMD_MEM_ENCRYPT */
+
+static inline bool sev_key_active(void) { return false; }
+
+#endif /* CONFIG_AMD_MEM_ENCRYPT */
+
 #define BUILDIO(bwl, bw, type)						\
 static inline void out##bwl(unsigned type value, int port)		\
 {									\
@@ -295,14 +310,34 @@ static inline unsigned type in##bwl##_p(int port)			\
 									\
 static inline void outs##bwl(int port, const void *addr, unsigned long count) \
 {									\
-	asm volatile("rep; outs" #bwl					\
-		     : "+S"(addr), "+c"(count) : "d"(port) : "memory");	\
+	if (sev_key_active()) {						\
+		unsigned type *value = (unsigned type *)addr;		\
+		while (count) {						\
+			out##bwl(*value, port);				\
+			value++;					\
+			count--;					\
+		}							\
+	} else {							\
+		asm volatile("rep; outs" #bwl				\
+			     : "+S"(addr), "+c"(count)			\
+			     : "d"(port) : "memory");			\
+	}								\
 }									\
 									\
 static inline void ins##bwl(int port, void *addr, unsigned long count)	\
 {									\
-	asm volatile("rep; ins" #bwl					\
-		     : "+D"(addr), "+c"(count) : "d"(port) : "memory");	\
+	if (sev_key_active()) {						\
+		unsigned type *value = (unsigned type *)addr;		\
+		while (count) {						\
+			*value = in##bwl(port);				\
+			value++;					\
+			count--;					\
+		}							\
+	} else {							\
+		asm volatile("rep; ins" #bwl				\
+			     : "+D"(addr), "+c"(count)			\
+			     : "d"(port) : "memory");			\
+	}								\
 }
 
 BUILDIO(b, b, char)
diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
index fd9c7bb51664..45110b60be21 100644
--- a/arch/x86/mm/mem_encrypt.c
+++ b/arch/x86/mm/mem_encrypt.c
@@ -41,6 +41,8 @@ static char sme_cmdline_off[] __initdata = "off";
  */
 u64 sme_me_mask __section(.data) = 0;
 EXPORT_SYMBOL_GPL(sme_me_mask);
+DEFINE_STATIC_KEY_FALSE(__sev);
+EXPORT_SYMBOL_GPL(__sev);
 
 static bool sev_enabled __section(.data);
 
@@ -313,6 +315,12 @@ void __init mem_encrypt_init(void)
 	if (sev_active())
 		dma_ops = &sev_dma_ops;
 
+	/*
+	 * With SEV, we need to unroll the rep string I/O instructions.
+	 */
+	if (sev_active())
+		static_branch_enable(&__sev);
+
 	pr_info("AMD %s active\n",
 		sev_active() ? "Secure Encrypted Virtualization (SEV)"
 			     : "Secure Memory Encryption (SME)");
-- 
2.9.5

  parent reply	other threads:[~2017-10-20 14:33 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-20 14:30 [Part1 PATCH v7 00/17] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2017-10-20 14:30 ` [Part1 PATCH v7 01/17] Documentation/x86: Add AMD Secure Encrypted Virtualization (SEV) description Brijesh Singh
2017-11-07 14:42   ` [tip:x86/asm] " tip-bot for Brijesh Singh
2017-10-20 14:30 ` [Part1 PATCH v7 02/17] x86/mm: Add Secure Encrypted Virtualization (SEV) support Brijesh Singh
2017-11-07 14:43   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 03/17] x86/mm: Don't attempt to encrypt initrd under SEV Brijesh Singh
2017-11-07 14:43   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 04/17] x86/realmode: Don't decrypt trampoline area " Brijesh Singh
2017-11-07 14:44   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 05/17] x86/mm: Use encrypted access of boot related data with SEV Brijesh Singh
2017-11-07 14:44   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 06/17] x86/mm: Include SEV for encryption memory attribute changes Brijesh Singh
2017-11-07 14:44   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 07/17] x86/efi: Access EFI data as encrypted when SEV is active Brijesh Singh
2017-11-07 14:45   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 08/17] resource: Consolidate resource walking code Brijesh Singh
2017-11-07 14:45   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 09/17] resource: Provide resource struct in resource walk callback Brijesh Singh
2017-11-07 14:46   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 10/17] x86/mm, resource: Use PAGE_KERNEL protection for ioremap of memory pages Brijesh Singh
2017-11-07 14:46   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 11/17] x86/mm: Add DMA support for SEV memory encryption Brijesh Singh
2017-11-07 14:46   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 12/17] x86/boot: Add early boot support when running with SEV active Brijesh Singh
2017-11-07 14:47   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` Brijesh Singh [this message]
2017-10-20 18:39   ` [Part1 PATCH v7 13/17] x86/io: Unroll string I/O when SEV is active Alan Cox
2017-10-21 11:26     ` Brijesh Singh
2017-11-07 14:47   ` [tip:x86/asm] " tip-bot for Tom Lendacky
2017-10-20 14:30 ` [Part1 PATCH v7 14/17] x86: Add support for changing memory encryption attribute in early boot Brijesh Singh
2017-11-07 14:48   ` [tip:x86/asm] " tip-bot for Brijesh Singh
2017-10-20 14:30 ` [Part1 PATCH v7 15/17] percpu: Introduce DEFINE_PER_CPU_DECRYPTED Brijesh Singh
2017-11-07 14:48   ` [tip:x86/asm] " tip-bot for Brijesh Singh
2017-10-20 14:30 ` [Part1 PATCH v7 16/17] X86/KVM: Decrypt shared per-cpu variables when SEV is active Brijesh Singh
2017-11-07 14:49   ` [tip:x86/asm] " tip-bot for Brijesh Singh
2017-10-20 14:30 ` [Part1 PATCH v7 17/17] X86/KVM: Clear encryption attribute " Brijesh Singh
2017-11-07 14:49   ` [tip:x86/asm] " tip-bot for Brijesh Singh
2017-11-15 23:57 ` [Part1 PATCH v7 00/17] x86: Secure Encrypted Virtualization (AMD) Steve Rutherford
2017-11-16 10:02   ` Borislav Petkov
2017-11-16 14:41     ` Tom Lendacky
2017-11-21 23:18       ` Steve Rutherford

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