From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751610AbdJZENc (ORCPT ); Thu, 26 Oct 2017 00:13:32 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:46832 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751397AbdJZEN1 (ORCPT ); Thu, 26 Oct 2017 00:13:27 -0400 X-Google-Smtp-Source: ABhQp+SM0642rRYam60jqjQ5Am3ZqELIY/oZt2lgsJlUF4v5XY0JGnEbwuEJAr/fobro4TqZ8IcAng== Date: Wed, 25 Oct 2017 21:13:26 -0700 From: Bjorn Andersson To: Georgi Djakov Cc: sboyd@codeaurora.org, jassisinghbrar@gmail.com, robh+dt@kernel.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v9 6/7] dt-bindings: clock: Document qcom,apcs binding Message-ID: <20171026041326.GJ1575@tuxbook> References: <20170921164940.20343-1-georgi.djakov@linaro.org> <20170921164940.20343-7-georgi.djakov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170921164940.20343-7-georgi.djakov@linaro.org> User-Agent: Mutt/1.8.3 (2017-05-23) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu 21 Sep 09:49 PDT 2017, Georgi Djakov wrote: > Add device-tree binding documentation for the Qualcom APCS clock > controller. This clock controller is a mux and half-integer divider > and provides the clock for the application CPU. > > Signed-off-by: Georgi Djakov > --- > .../devicetree/bindings/clock/qcom,apcs.txt | 27 ++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,apcs.txt > > diff --git a/Documentation/devicetree/bindings/clock/qcom,apcs.txt b/Documentation/devicetree/bindings/clock/qcom,apcs.txt > new file mode 100644 > index 000000000000..8083bcc33ebe > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,apcs.txt > @@ -0,0 +1,27 @@ > +Qualcomm APCS Clock Controller Binding > +-------------------------------------- > +The APCS hardware block provides a combined mux and half-integer divider > +functionality. It is used for a main CPU clock mux on MSM8916 platforms. > + > +Required properties : > +- compatible : shall contain only one of the following: > + > + "qcom,msm8916-apcs-clk" > + > +- clocks : shall be the phandle to the main input CPU PLL clock > + > +- #clock-cells : must be set to <0> > + > +Example: > + > + apcs: mailbox@b011000 { This node describes the "apcs kpss global"-block. > + compatible = "qcom,msm8916-apcs-kpss-global"; > + reg = <0xb011000 0x1000>; > + #mbox-cells = <1>; > + > + apcs_clk: apcs_clk { This node describes that your implementation is split in two different drivers. In other words, I think you should add the two clock properties to the apcs node, rather than adding a subnode. I also think you can make the mailbox driver implement the clock given the 8916 compatible. > + compatible = "qcom,msm8916-apcs-clk"; > + clocks = <&a53pll>; > + #clock-cells = <0>; > + }; > + }; Regards, Bjorn