Re: [PATCH 10/18] x86/asm/32: Pull MSR_IA32_SYSENTER_CS update code out of native_load_sp0()

Andy Lutomirski
2017-10-27T15:50:27Z

On Fri, Oct 27, 2017 at 6:51 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Thu, 26 Oct 2017, Andy Lutomirski wrote:
>> diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
>> index b390ff76e58f..0167e3e35a57 100644
>> --- a/arch/x86/include/asm/processor.h
>> +++ b/arch/x86/include/asm/processor.h
>> @@ -520,13 +520,6 @@ static inline void
>> native_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
>> {
>> tss->x86_tss.sp0 = thread->sp0;
>> -#ifdef CONFIG_X86_32
>> - /* Only happens when SEP is enabled, no need to test "SEP"arately: */
>> - if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
>> - tss->x86_tss.ss1 = thread->sysenter_cs;
>> - wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
>> - }
>> -#endif
>> }
>>
>> static inline void native_swapgs(void)
>> diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
>> index fcc5cd387fd1..f3fa19925ae1 100644
>> --- a/arch/x86/include/asm/switch_to.h
>> +++ b/arch/x86/include/asm/switch_to.h
>> @@ -72,4 +72,15 @@ do { \
>> ((last) = __switch_to_asm((prev), (next))); \
>> } while (0)
>>
>> +#ifdef CONFIG_X86_32
>> +static inline void refresh_sysenter_cs(struct thread_struct *thread)
>> +{
>> + /* Only happens when SEP is enabled, no need to test "SEP"arately: */
>> + if (unlikely(this_cpu_read(cpu_tss.x86_tss.ss1) == thread->sysenter_cs))
>> + return;
>> +
>> + this_cpu_write(cpu_tss.x86_tss.ss1, thread->sysenter_cs);
>
> You lost the wrmsr() on the way... Ideally you move the code unmodified
> first and then do the this_cpu_ change on top.

I don't think that would work. The old location of that code had a
local variable "tss", and the new location doesn't. I could make the
nonsensical one-line change as a preparatory patch, but I don't think
that really makes what's changing any clearer.

Anyway, I fixed it.

>
> Thanks,
>
> tglx