From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932829AbdJaUhE (ORCPT ); Tue, 31 Oct 2017 16:37:04 -0400 Received: from mga01.intel.com ([192.55.52.88]:19045 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753540AbdJaUhD (ORCPT ); Tue, 31 Oct 2017 16:37:03 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,326,1505804400"; d="scan'208";a="1031799327" Date: Tue, 31 Oct 2017 13:39:52 -0700 From: Jacob Pan To: "Lukoshkov, Maksim" Cc: , LKML , Joerg Roedel , David Woodhouse , Greg Kroah-Hartman , Rafael Wysocki , Jean-Philippe Brucker , "Liu, Yi L" , Lan Tianyu , "Tian, Kevin" , Raj Ashok , Alex Williamson , jacob.jun.pan@linux.intel.com Subject: Re: [v2,04/16] iommu/vt-d: support flushing more TLB types Message-ID: <20171031133952.03105b04@jacob-builder> In-Reply-To: References: <1507244624-39189-5-git-send-email-jacob.jun.pan@linux.intel.com> Organization: OTC X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 26 Oct 2017 14:02:13 +0100 "Lukoshkov, Maksim" wrote: > On 10/6/2017 00:03, Jacob Pan wrote: > > Signed-off-by: Jacob Pan > > --- > > drivers/iommu/dmar.c | 53 > > ++++++++++++++++++++++++++++++++++++++++++--- > > drivers/iommu/intel-iommu.c | 3 ++- include/linux/intel-iommu.h | > > 10 +++++++-- 3 files changed, 60 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c > > index 57c920c..2fbff8b 100644 > > --- a/drivers/iommu/dmar.c > > +++ b/drivers/iommu/dmar.c > > @@ -1336,11 +1336,25 @@ void qi_flush_iotlb(struct intel_iommu > > *iommu, u16 did, u64 addr, qi_submit_sync(&desc, iommu); > > } > > > > -void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 > > qdep, > > - u64 addr, unsigned mask) > > +void qi_flush_eiotlb(struct intel_iommu *iommu, u16 did, u64 addr, > > u32 pasid, > > + unsigned int size_order, u64 granu, bool global) > > { > > struct qi_desc desc; > > > > + desc.low = QI_EIOTLB_PASID(pasid) | QI_EIOTLB_DID(did) | > > + QI_EIOTLB_GRAN(granu) | QI_EIOTLB_TYPE; > > + desc.high = QI_EIOTLB_ADDR(addr) | QI_EIOTLB_GL(global) | > > + QI_EIOTLB_IH(0) | QI_EIOTLB_AM(size_order); > > + qi_submit_sync(&desc, iommu); > > +} > > + > > +void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 > > pfsid, > > + u16 qdep, u64 addr, unsigned mask) > > +{ > > + struct qi_desc desc; > > + > > + pr_debug_ratelimited("%s: sid %d, pfsid %d, qdep %d, addr > > %llx, mask %d\n", > > + __func__, sid, pfsid, qdep, addr, mask); > > if (mask) { > > BUG_ON(addr & ((1 << (VTD_PAGE_SHIFT + mask)) - > > 1)); addr |= (1ULL << (VTD_PAGE_SHIFT + mask - 1)) - 1; > > @@ -1352,7 +1366,40 @@ void qi_flush_dev_iotlb(struct intel_iommu > > *iommu, u16 sid, u16 qdep, qdep = 0; > > > > desc.low = QI_DEV_IOTLB_SID(sid) | > > QI_DEV_IOTLB_QDEP(qdep) | > > - QI_DIOTLB_TYPE; > > + QI_DIOTLB_TYPE | QI_DEV_IOTLB_SID(pfsid); > So this change just combining sid and pfsid together, i.e. (sid | > pfsid)? What if both of them are not zero? I made a mistake here, it should be: QI_DIOTLB_TYPE | QI_DEV_IOTLB_PFSID(pfsid); Thanks for the catch. Jacob > [...] > [Jacob Pan]