From: Stephen Boyd <sboyd@codeaurora.org>
To: sean.wang@mediatek.com
Cc: mturquette@baylibre.com, robh+dt@kernel.org,
matthias.bgg@gmail.com, mark.rutland@arm.com,
p.zabel@pengutronix.de, devicetree@vger.kernel.org,
linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Chen Zhong <chen.zhong@mediatek.com>
Subject: Re: [PATCH v2 3/4] clk: mediatek: add clock support for MT7622 SoC
Date: Thu, 2 Nov 2017 01:12:03 -0700 [thread overview]
Message-ID: <20171102081203.GF11011@codeaurora.org> (raw)
In-Reply-To: <9d8aa50c0e9f45e7a7fbb3e0682e7d8ed72a0205.1507174799.git.sean.wang@mediatek.com>
On 10/05, sean.wang@mediatek.com wrote:
> From: Sean Wang <sean.wang@mediatek.com>
>
> Add all supported clocks exported from every susbystem found on MT7622 SoC
> such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
> ethsys and audsys.
>
> Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-11-02 8:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1507174799.git.sean.wang@mediatek.com>
2017-10-05 3:50 ` [PATCH v2 1/4] dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC sean.wang
2017-11-02 8:12 ` Stephen Boyd
2017-10-05 3:50 ` [PATCH v2 2/4] clk: mediatek: add the option for determining PLL source clock sean.wang
2017-11-02 8:12 ` Stephen Boyd
2017-10-05 3:50 ` [PATCH v2 3/4] clk: mediatek: add clock support for MT7622 SoC sean.wang
2017-11-02 8:12 ` Stephen Boyd [this message]
2017-10-05 3:50 ` [PATCH v2 4/4] clk: mediatek: add clocks dt-bindings required header " sean.wang
2017-11-02 8:11 ` Stephen Boyd
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