From: Peter Zijlstra <peterz@infradead.org>
To: Dave Hansen <dave.hansen@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com,
tim.c.chen@linux.intel.com, hpa@linux.intel.com, bp@alien8.de,
rientjes@google.com, imammedo@redhat.com, prarit@redhat.com,
toshi.kani@hp.com, brice.goglin@gmail.com, mingo@kernel.org
Subject: Re: [RFC][PATCH] x86, sched: allow topolgies where NUMA nodes share an LLC
Date: Tue, 7 Nov 2017 09:30:19 +0100 [thread overview]
Message-ID: <20171107083019.GG3326@worktop> (raw)
In-Reply-To: <20171106221500.310295D7@viggo.jf.intel.com>
On Mon, Nov 06, 2017 at 02:15:00PM -0800, Dave Hansen wrote:
> But, the CPUID for the SNC configuration discussed above enumerates
> the LLC as being shared by the entire package. This is not 100%
> precise because the entire cache is not usable by all accesses. But,
> it *is* the way the hardware enumerates itself, and this is not likely
> to change.
So CPUID and SRAT will remain inconsistent; even in future products?
That would absolutely blow chunks.
If that is the case, we'd best use a fake feature like
X86_BUG_TOPOLOGY_BROKEN and use that instead of an ever growing list of
models in this code.
> +/*
> + * Set if a package/die has multiple NUMA nodes inside.
> + * AMD Magny-Cours, Intel Cluster-on-Die, and Intel
> + * Sub-NUMA Clustering have this.
> + */
> +static bool x86_has_numa_in_package;
> +
> static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
> {
> int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
>
> + /* Do not match if we do not have a valid APICID for cpu: */
> + if (per_cpu(cpu_llc_id, cpu1) == BAD_APICID)
> + return false;
> +
> + /* Do not match if LLC id does not match: */
> + if (per_cpu(cpu_llc_id, cpu1) != per_cpu(cpu_llc_id, cpu2))
> + return false;
>
> + /*
> + * Some Intel CPUs enumerate an LLC that is shared by
> + * multiple NUMA nodes. The LLC on these systems is
> + * shared for off-package data acccess but private to the
> + * NUMA node (half of the package) for on-package access.
> + *
> + * CPUID can only enumerate the cache as being shared *or*
> + * unshared, but not this particular configuration. The
> + * CPU in this case enumerates the cache to be shared
> + * across the entire package (spanning both NUMA nodes).
> + */
> + if (!topology_same_node(c, o) &&
> + (c->x86_model == INTEL_FAM6_SKYLAKE_X)) {
This needs a c->x86_vendor test; imagine the fun when AMD releases a
part with model == SKX ...
> + /* Use NUMA instead of coregroups for scheduling: */
> + x86_has_numa_in_package = true;
> +
> + /*
> + * Now, tell the truth, that the LLC matches. But,
> + * note that throwing away coregroups for
> + * scheduling means this will have no actual effect.
> + */
> + return true;
What are the ramifications here? Is anybody else using that cpumask
outside of the scheduler topology setup?
> + }
> +
> + return topology_sane(c, o, "llc");
> }
next prev parent reply other threads:[~2017-11-07 8:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-06 22:15 [RFC][PATCH] x86, sched: allow topolgies where NUMA nodes share an LLC Dave Hansen
2017-11-07 8:30 ` Peter Zijlstra [this message]
2017-11-07 16:22 ` Dave Hansen
2017-11-07 19:56 ` Borislav Petkov
2017-11-08 9:31 ` Peter Zijlstra
2017-11-09 0:00 ` Dave Hansen
2017-11-09 14:07 ` Borislav Petkov
2017-11-09 18:13 ` Dave Hansen
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