From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755352AbdKJANG (ORCPT ); Thu, 9 Nov 2017 19:13:06 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:56629 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755196AbdKJANE (ORCPT ); Thu, 9 Nov 2017 19:13:04 -0500 X-Google-Smtp-Source: ABhQp+RILHZR8KByjKWqlpXPOjrwdHN/VCwDNWoTP2pvfKEApN4I3O7ySKNIRIqVFlAKGADeWUUUww== Date: Thu, 9 Nov 2017 16:12:59 -0800 From: Bjorn Andersson To: MyungJoo Ham Cc: Chanwoo Choi , Kyungmin Park , "rafael.j.wysocki@intel.com" , "chanwoo@kernel.org" , Inki Dae , lkml , Linux PM list , Vinayak Holikatti , Vivek Gautam Subject: Re: [PATCH v5 0/7] PM / devfreq: Use OPP interface to handle the frequency Message-ID: <20171110001259.GD28761@minitux> References: <1508722332-10628-1-git-send-email-cw00.choi@samsung.com> <20171109235654epcms1p29b8d05dce899f1b11919823ed66cbd1c@epcms1p2> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20171109235654epcms1p29b8d05dce899f1b11919823ed66cbd1c@epcms1p2> User-Agent: Mutt/1.9.1 (2017-09-22) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu 09 Nov 15:56 PST 2017, MyungJoo Ham wrote: > > On Sun, Oct 22, 2017 at 6:32 PM, Chanwoo Choi wrote: > > > These patches makes the devfreq to use the OPP interface and clean-up codes. > > > > > > > Hi Chanwoo, > > > > This patch series breaks UFS support on modern Qualcomm platforms > > (e.g. MSM8996). > > Could you please show us the code location of it?  > The driver is drivers/scsi/ufs/ufshcd.c function ufshcd_probe_hba() calls devm_devfreq_add_device() without there being an opp table associated with hba->dev. This used to return fine and ufshcd_devfreq_target() was called with *freq = UINT_MAX. Unfortunately the driver seems to be designed in such a way that without a call to ufshcd_devfreq_target() with *freq 0 or UINT_MAX some clock is left off, causing my board to reboot; so there's unfortunately a few levels of issues to fix here. Regards, Bjorn