From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934959AbdKPTTl (ORCPT ); Thu, 16 Nov 2017 14:19:41 -0500 Received: from mx1.redhat.com ([209.132.183.28]:59196 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933013AbdKPTTe (ORCPT ); Thu, 16 Nov 2017 14:19:34 -0500 Date: Thu, 16 Nov 2017 20:19:31 +0100 From: Andrea Arcangeli To: Dave Hansen Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, moritz.lipp@iaik.tugraz.at, daniel.gruss@iaik.tugraz.at, michael.schwarz@iaik.tugraz.at, richard.fellner@student.tugraz.at, luto@kernel.org, torvalds@linux-foundation.org, keescook@google.com, hughd@google.com, x86@kernel.org Subject: Re: [PATCH 23/30] x86, kaiser: use PCID feature to make user and kernel switches faster Message-ID: <20171116191931.GC2344@redhat.com> References: <20171110193058.BECA7D88@viggo.jf.intel.com> <20171110193150.1E736CE0@viggo.jf.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171110193150.1E736CE0@viggo.jf.intel.com> User-Agent: Mutt/1.9.1 (2017-09-22) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 16 Nov 2017 19:19:34 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, On Fri, Nov 10, 2017 at 11:31:50AM -0800, Dave Hansen wrote: > Hugh Dickins also points out that PCIDs really have two distinct > use-cases in the context of KAISER. The first way they can be used I don't see why you try to retain such a minor optimization for newer Intel chips when at the same you prevent KAISER to run with good performance on older Intel chips like SandyBridge/IvyBridge which would create a major performance regression for those two. I'd prefer if you reverse the PCID feature of v4.14 when KASIER is enabled (at build time would be enough initially), and you use just two asids to only accelerate enter/exit kernel and you flush the whole TLB over mm switch like Hugh suggested. It may not even be worth to flush over cr4, as you've only two asids to deal with anyway.