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Date: Mon, 20 Nov 2017 15:10:07 +0100
From: Jiri Olsa <jolsa@redhat.com>
To: Megha Dey <megha.dey@linux.intel.com>
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Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring
 support
Message-ID: <20171120141007.GB23281@krava>
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On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote:

SNIP

> +/* Branch Monitoring default and mask values */
> +#define BM_MAX_WINDOW_SIZE		0x3ff
> +#define BM_MAX_THRESHOLD		0x7f
> +#define BM_MAX_EVENTS			6
> +#define BM_WINDOW_SIZE_SHIFT		8
> +#define BM_THRESHOLD_SHIFT		8
> +#define BM_EVENT_TYPE_SHIFT		1
> +#define BM_GUEST_DISABLE_SHIFT		3
> +#define BM_LBR_FREEZE_SHIFT		2
> +#define BM_WINDOW_CNT_SEL_SHIFT		24
> +#define BM_CNT_AND_MODE_SHIFT		26
> +#define BM_MISPRED_EVT_CNT_SHIFT	15
> +#define BM_ENABLE			0x3
> +#define BM_CNTR_ENABLE			1
> +
> +static unsigned int bm_window_size = BM_MAX_WINDOW_SIZE;
> +static unsigned int bm_guest_disable;
> +static unsigned int bm_lbr_freeze;
> +static unsigned int bm_window_cnt_sel;
> +static unsigned int bm_cnt_and_mode;
> +
> +static unsigned int bm_threshold = BM_MAX_THRESHOLD;
> +static unsigned int bm_mispred_evt_cnt;
> +
> +/* Branch monitoring counter owners */
> +static struct perf_event **bm_counter_owner;

that's still global.. 2 counters per system

jirka