From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753146AbdKWOYX (ORCPT ); Thu, 23 Nov 2017 09:24:23 -0500 Received: from mga06.intel.com ([134.134.136.31]:9628 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753050AbdKWOYV (ORCPT ); Thu, 23 Nov 2017 09:24:21 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,441,1505804400"; d="scan'208";a="6189784" Date: Thu, 23 Nov 2017 16:24:17 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Kees Cook Cc: Rodrigo Vivi , intel-gfx@lists.freedesktop.org, LKML Subject: Re: [Intel-gfx] i915: enum intel_dpll_id cast Message-ID: <20171123142417.GR10981@intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.7.2 (2016-11-26) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 22, 2017 at 12:54:49PM -0800, Kees Cook wrote: > Hi, > > While doing Clang test builds, this was reported: > > drivers/gpu/drm/i915/intel_ddi.c:1481:30: warning: implicit conversion > from enumeration type 'enum port' to different enumeration type 'enum > intel_dpll_id' [-Wenum-conversion] > enum intel_dpll_id pll_id = port; > ~~~~~~ ^~~~ > > Which is from: > > static void bxt_ddi_clock_get(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > enum port port = intel_ddi_get_encoder_port(encoder); > enum intel_dpll_id pll_id = port; > > pipe_config->port_clock = bxt_calc_pll_link(dev_priv, pll_id); > ... > } > > In looking at it, it seems to be harmless if as enum port has a > smaller range than enum intel_dpll_id. I just wanted to check if maybe > something might go weird, since DPLL_ID_LCPLL_2700 maybe ends up > getting seen as I915_MAX_PORTS? BXT can only ever have port values PORT_[A-C] and the matching dpll_id values (DPLL_ID_SKL_DPLL[0-2]), so it's fine. Also that implicit cast is actually gone from the latest code thanks to commit bb911536f07e ("drm/i915: Eliminate pll->state usage from bxt_calc_pll_link()"). > > enum port { > PORT_NONE = -1, > PORT_A = 0, > PORT_B, > PORT_C, > PORT_D, > PORT_E, > I915_MAX_PORTS > }; > > enum intel_dpll_id { > ... > DPLL_ID_LCPLL_2700 = 5, > ... > }; > > > Thanks! > > -Kees > > -- > Kees Cook > Pixel Security > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC