From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752952AbdK2VdT (ORCPT ); Wed, 29 Nov 2017 16:33:19 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:36208 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751901AbdK2VdM (ORCPT ); Wed, 29 Nov 2017 16:33:12 -0500 From: "Andrew F. Davis" To: Liam Girdwood , Mark Brown , Rob Herring , Mark Rutland , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren CC: , , , "Andrew F . Davis" Subject: [PATCH v2 05/19] ASoC: tlv320aic31xx: Fix GPIO1 register definition Date: Wed, 29 Nov 2017 15:32:46 -0600 Message-ID: <20171129213300.20021-6-afd@ti.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171129213300.20021-1-afd@ti.com> References: <20171129213300.20021-1-afd@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GPIO1 control register is number 51, fix this here. Fixes: bafcbfe429eb ("ASoC: tlv320aic31xx: Make the register values human readable") Signed-off-by: Andrew F. Davis --- sound/soc/codecs/tlv320aic31xx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/tlv320aic31xx.h b/sound/soc/codecs/tlv320aic31xx.h index a9ea2f99eba0..6efea0485392 100644 --- a/sound/soc/codecs/tlv320aic31xx.h +++ b/sound/soc/codecs/tlv320aic31xx.h @@ -109,7 +109,7 @@ struct aic31xx_pdata { /* INT2 interrupt control */ #define AIC31XX_INT2CTRL AIC31XX_REG(0, 49) /* GPIO1 control */ -#define AIC31XX_GPIO1 AIC31XX_REG(0, 50) +#define AIC31XX_GPIO1 AIC31XX_REG(0, 51) #define AIC31XX_DACPRB AIC31XX_REG(0, 60) /* ADC Instruction Set Register */ -- 2.15.0