From: Peter Zijlstra <peterz@infradead.org>
To: qiaowei.ren@intel.com, luto@kernel.org,
adam.buchbinder@gmail.com, mst@redhat.com, mhiramat@kernel.org,
dave.hansen@linux.intel.com, mingo@kernel.org,
linux-kernel@vger.kernel.org, colin.king@canonical.com,
jslaby@suse.cz, pbonzini@redhat.com, cmetcalf@mellanox.com,
akpm@linux-foundation.org, vbabka@suse.cz, acme@redhat.com,
brgerst@gmail.com, shuah@kernel.org, bp@suse.de,
paul.gortmaker@windriver.com, lstoakes@gmail.com, hpa@zytor.com,
thgarnie@google.com, keescook@chromium.org,
adrian.hunter@intel.com, ricardo.neri-calderon@linux.intel.com,
ray.huang@amd.com, dvyukov@google.com, ravi.v.shankar@intel.com,
slaoub@gmail.com, tglx@linutronix.de, corbet@lwn.net
Cc: linux-tip-commits@vger.kernel.org
Subject: Re: [tip:x86/mpx] x86/insn-eval: Add utility function to get segment descriptor
Date: Tue, 5 Dec 2017 18:48:44 +0100 [thread overview]
Message-ID: <20171205174844.GM3165@worktop.lehotels.local> (raw)
In-Reply-To: <tip-670f928ba09b06712da34a3c44be6c8fa561fb19@git.kernel.org>
On Wed, Nov 01, 2017 at 02:00:28PM -0700, tip-bot for Ricardo Neri wrote:
> +static struct desc_struct *get_desc(unsigned short sel)
> +{
> + struct desc_ptr gdt_desc = {0, 0};
> + unsigned long desc_base;
> +
> +#ifdef CONFIG_MODIFY_LDT_SYSCALL
> + if ((sel & SEGMENT_TI_MASK) == SEGMENT_LDT) {
> + struct desc_struct *desc = NULL;
> + struct ldt_struct *ldt;
> +
> + /* Bits [15:3] contain the index of the desired entry. */
> + sel >>= 3;
> +
> + mutex_lock(¤t->active_mm->context.lock);
> + ldt = current->active_mm->context.ldt;
> + if (ldt && sel < ldt->nr_entries)
> + desc = &ldt->entries[sel];
> +
> + mutex_unlock(¤t->active_mm->context.lock);
> +
> + return desc;
> + }
> +#endif
This is broken right? You unlock and then return @desc, which afaict can
at that point get freed by free_ldt_struct().
Something like the below ought to cure; although its not entirely
pretty either.
---
diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c
index e664058c4491..c234ef2b4430 100644
--- a/arch/x86/lib/insn-eval.c
+++ b/arch/x86/lib/insn-eval.c
@@ -572,6 +572,11 @@ static struct desc_struct *get_desc(unsigned short sel)
struct desc_ptr gdt_desc = {0, 0};
unsigned long desc_base;
+ /*
+ * Relies on IRQs being disabled to serialize against the LDT.
+ */
+ lockdep_assert_irqs_disabled();
+
#ifdef CONFIG_MODIFY_LDT_SYSCALL
if ((sel & SEGMENT_TI_MASK) == SEGMENT_LDT) {
struct desc_struct *desc = NULL;
@@ -580,13 +585,10 @@ static struct desc_struct *get_desc(unsigned short sel)
/* Bits [15:3] contain the index of the desired entry. */
sel >>= 3;
- mutex_lock(¤t->active_mm->context.lock);
ldt = current->active_mm->context.ldt;
if (ldt && sel < ldt->nr_entries)
desc = &ldt->entries_va[sel];
- mutex_unlock(¤t->active_mm->context.lock);
-
return desc;
}
#endif
@@ -626,6 +628,7 @@ static struct desc_struct *get_desc(unsigned short sel)
*/
unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)
{
+ unsigned long base, flags;
struct desc_struct *desc;
short sel;
@@ -664,11 +667,15 @@ unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)
if (!sel)
return -1L;
+ base = -1;
+
+ local_irq_save(flags);
desc = get_desc(sel);
- if (!desc)
- return -1L;
+ if (desc)
+ base = get_desc_base(desc);
+ local_irq_restore(flags);
- return get_desc_base(desc);
+ return base;
}
/**
@@ -690,8 +697,8 @@ unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)
*/
static unsigned long get_seg_limit(struct pt_regs *regs, int seg_reg_idx)
{
+ unsigned long flags, limit = 0;
struct desc_struct *desc;
- unsigned long limit;
short sel;
sel = get_segment_selector(regs, seg_reg_idx);
@@ -704,19 +711,20 @@ static unsigned long get_seg_limit(struct pt_regs *regs, int seg_reg_idx)
if (!sel)
return 0;
+ local_irq_save(flags);
desc = get_desc(sel);
- if (!desc)
- return 0;
-
- /*
- * If the granularity bit is set, the limit is given in multiples
- * of 4096. This also means that the 12 least significant bits are
- * not tested when checking the segment limits. In practice,
- * this means that the segment ends in (limit << 12) + 0xfff.
- */
- limit = get_desc_limit(desc);
- if (desc->g)
- limit = (limit << 12) + 0xfff;
+ if (desc) {
+ /*
+ * If the granularity bit is set, the limit is given in multiples
+ * of 4096. This also means that the 12 least significant bits are
+ * not tested when checking the segment limits. In practice,
+ * this means that the segment ends in (limit << 12) + 0xfff.
+ */
+ limit = get_desc_limit(desc);
+ if (desc->g)
+ limit = (limit << 12) + 0xfff;
+ }
+ local_irq_restore(flags);
return limit;
}
@@ -740,19 +748,23 @@ static unsigned long get_seg_limit(struct pt_regs *regs, int seg_reg_idx)
int insn_get_code_seg_params(struct pt_regs *regs)
{
struct desc_struct *desc;
+ unsigned long flags;
+ int ret = -EINVAL;
short sel;
- if (v8086_mode(regs))
+ if (v8086_mode(regs)) {
/* Address and operand size are both 16-bit. */
return INSN_CODE_SEG_PARAMS(2, 2);
+ }
sel = get_segment_selector(regs, INAT_SEG_REG_CS);
if (sel < 0)
return sel;
+ local_irq_save(flags);
desc = get_desc(sel);
if (!desc)
- return -EINVAL;
+ goto out;
/*
* The most significant byte of the Type field of the segment descriptor
@@ -760,29 +772,37 @@ int insn_get_code_seg_params(struct pt_regs *regs)
* segment, return error.
*/
if (!(desc->type & BIT(3)))
- return -EINVAL;
+ goto out;
switch ((desc->l << 1) | desc->d) {
case 0: /*
* Legacy mode. CS.L=0, CS.D=0. Address and operand size are
* both 16-bit.
*/
- return INSN_CODE_SEG_PARAMS(2, 2);
+ ret = INSN_CODE_SEG_PARAMS(2, 2);
+ break;
case 1: /*
* Legacy mode. CS.L=0, CS.D=1. Address and operand size are
* both 32-bit.
*/
- return INSN_CODE_SEG_PARAMS(4, 4);
+ ret = INSN_CODE_SEG_PARAMS(4, 4);
+ break;
case 2: /*
* IA-32e 64-bit mode. CS.L=1, CS.D=0. Address size is 64-bit;
* operand size is 32-bit.
*/
- return INSN_CODE_SEG_PARAMS(4, 8);
+ ret = INSN_CODE_SEG_PARAMS(4, 8);
+ break;
+
case 3: /* Invalid setting. CS.L=1, CS.D=1 */
/* fall through */
default:
- return -EINVAL;
+ break;
}
+out:
+ local_irq_restore(flags);
+
+ return ret;
}
/**
next prev parent reply other threads:[~2017-12-05 17:49 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-27 20:25 [PATCH v10 00/18] x86: Add address resolution code for UMIP and MPX Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 01/18] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-11-01 20:55 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 02/18] x86/boot: Relocate definition of the initial state of CR0 Ricardo Neri
2017-11-01 20:55 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 03/18] ptrace,x86: Make user_64bit_mode() available to 32-bit builds Ricardo Neri
2017-11-01 20:55 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 04/18] uprobes/x86: Use existing definitions for segment override prefixes Ricardo Neri
2017-11-01 20:56 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 05/18] x86/mpx: Simplify handling of errors when computing linear addresses Ricardo Neri
2017-11-01 20:56 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 06/18] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-11-01 20:57 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 07/18] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b Ricardo Neri
2017-11-01 20:57 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 08/18] x86/mpx: Do not use SIB.base if its value is 101b and ModRM.mod = 0 Ricardo Neri
2017-11-01 20:57 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 09/18] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file Ricardo Neri
2017-11-01 20:58 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 10/18] x86/insn-eval: Do not BUG on invalid register type Ricardo Neri
2017-11-01 20:58 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 11/18] x86/insn-eval: Add a utility function to get register offsets Ricardo Neri
2017-11-01 20:59 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 12/18] x86/insn-eval: Add utility function to identify string instructions Ricardo Neri
2017-11-01 20:59 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 13/18] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-11-01 21:00 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-11-09 11:12 ` [PATCH v10 13/18] " Arnd Bergmann
2017-11-09 13:50 ` Ingo Molnar
2017-10-27 20:25 ` [PATCH v10 14/18] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-11-01 21:00 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-12-05 17:48 ` Peter Zijlstra [this message]
2017-12-05 18:14 ` Borislav Petkov
2017-12-05 18:38 ` Peter Zijlstra
2017-12-05 21:29 ` Borislav Petkov
2017-12-07 7:23 ` Ricardo Neri
2017-12-07 8:03 ` Borislav Petkov
2017-12-07 7:26 ` Ricardo Neri
2017-12-07 8:01 ` Borislav Petkov
2017-10-27 20:25 ` [PATCH v10 15/18] x86/insn-eval: Add utility functions to get segment descriptor base address and limit Ricardo Neri
2017-11-01 21:00 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 16/18] x86/insn-eval: Add function to get default params of code segment Ricardo Neri
2017-11-01 21:01 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 17/18] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 101b Ricardo Neri
2017-11-01 21:01 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
2017-10-27 20:25 ` [PATCH v10 18/18] x86/insn-eval: Incorporate segment base in linear address computation Ricardo Neri
2017-11-01 17:56 ` Borislav Petkov
2017-11-01 19:08 ` Ricardo Neri
2017-11-01 21:02 ` [tip:x86/mpx] " tip-bot for Ricardo Neri
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