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Date: Wed, 13 Dec 2017 14:36:24 -0800
From: Nicolin Chen <nicoleotsuka@gmail.com>
To: "Maciej S. Szmigiero" <mail@maciej.szmigiero.name>
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Subject: Re: [PATCH v2 03/11] ASoC: fsl_ssi: Refine all comments
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On Wed, Dec 13, 2017 at 11:28:51PM +0100, Maciej S. Szmigiero wrote:

> > -	/*
> > -	 * If we're in synchronous mode, and the SSI is already enabled,
> > -	 * then STCCR is already set properly.
> > -	 */
> > +	/* To support simultaneous TX and RX, bypass it if SSI is enabled */
> >  	if (enabled && ssi->cpu_dai_drv.symmetric_rates)
> >  		return 0;
> >  
> 
> I would say that the old comment described better what is happening -
> since in synchronous (& non-AC'97) mode STCCR controls both TX and RX
> the first direction that is started (either playback or capture) is the
> only direction that needs to configure SSI in hw_params().

There is also an SCR register configuration in this hw_params(),
so the old comment has to be updated. But I would take it into
consideration and revise a bit.

Thanks.