From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752947AbdLYRni (ORCPT ); Mon, 25 Dec 2017 12:43:38 -0500 Received: from mail-pl0-f68.google.com ([209.85.160.68]:36331 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751456AbdLYRnf (ORCPT ); Mon, 25 Dec 2017 12:43:35 -0500 X-Google-Smtp-Source: ACJfBou9oDHcjGwXi3TX0ZbZUG61S7N7gZQ+/l7TouRquG7MtKK/7C2L58z9E68YWTjjzlS86dNZ4Q== Date: Mon, 25 Dec 2017 09:43:33 -0800 From: Guenter Roeck To: James Hogan Cc: Ralf Baechle , Paul Burton , linux-kernel@vger.kernel.org, James Hogan , linux-mips@linux-mips.org Subject: Re: MIPS: Fix CPS SMP NS16550 UART defaults Message-ID: <20171225174333.GA28567@roeck-us.net> References: <20171121000240.4058-1-james.hogan@mips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171121000240.4058-1-james.hogan@mips.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 21, 2017 at 12:02:40AM +0000, James Hogan wrote: > From: James Hogan > > The MIPS_CPS_NS16550_BASE and MIPS_CPS_NS16550_SHIFT options have no > defaults for non-Malta platforms which select SYS_SUPPORTS_MIPS_CPS > (i.e. the pistachio and generic platforms). This is problematic for > automated allyesconfig and allmodconfig builds based on these platforms, > since make silentoldconfig tries to ask the user for values, and > especially since v4.15 where the default platform was switched to > generic. > > Default these options to 0 and arrange for MIPS_CPS_NS16550 to be no > when using that default base address, so that the option only has an > effect when the default is provided (i.e. Malta) or when a value is > provided by the user. > > Fixes: 609cf6f2291a ("MIPS: CPS: Early debug using an ns16550-compatible UART") > Signed-off-by: James Hogan > Reviewed-by: Paul Burton > Cc: Ralf Baechle > Cc: Guenter Roeck > Cc: linux-mips@linux-mips.org > Tested-by: Guenter Roeck Still not applied, mips builds still broken both in mainline and -next (and worse in -next). Doesn't 0day report all this breakage automatically ? Guenter > --- > Guenter: I'm guessing this is the problem you're referring to. > --- > arch/mips/Kconfig.debug | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug > index 464af5e025d6..0749c3724543 100644 > --- a/arch/mips/Kconfig.debug > +++ b/arch/mips/Kconfig.debug > @@ -124,30 +124,36 @@ config SCACHE_DEBUGFS > > If unsure, say N. > > -menuconfig MIPS_CPS_NS16550 > +menuconfig MIPS_CPS_NS16550_BOOL > bool "CPS SMP NS16550 UART output" > depends on MIPS_CPS > help > Output debug information via an ns16550 compatible UART if exceptions > occur early in the boot process of a secondary core. > > -if MIPS_CPS_NS16550 > +if MIPS_CPS_NS16550_BOOL > + > +config MIPS_CPS_NS16550 > + def_bool MIPS_CPS_NS16550_BASE != 0 > > config MIPS_CPS_NS16550_BASE > hex "UART Base Address" > default 0x1b0003f8 if MIPS_MALTA > + default 0 > help > The base address of the ns16550 compatible UART on which to output > debug information from the early stages of core startup. > > + This is only used if non-zero. > + > config MIPS_CPS_NS16550_SHIFT > int "UART Register Shift" > - default 0 if MIPS_MALTA > + default 0 > help > The number of bits to shift ns16550 register indices by in order to > form their addresses. That is, log base 2 of the span between > adjacent ns16550 registers in the system. > > -endif # MIPS_CPS_NS16550 > +endif # MIPS_CPS_NS16550_BOOL > > endmenu