From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753131AbdL1MYe (ORCPT ); Thu, 28 Dec 2017 07:24:34 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:43413 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751372AbdL1MYc (ORCPT ); Thu, 28 Dec 2017 07:24:32 -0500 X-Google-Smtp-Source: ACJfBouuxScjgM2QA0aJ/prWBOqfIbZHe4WoxUFVqDSRsNLe6ctorDd2fAQZobSVgqcsugt0ra3cHw== Date: Thu, 28 Dec 2017 13:24:29 +0100 From: Ingo Molnar To: Jia Zhang Cc: bp@alien8.de, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org, tony.luck@intel.com Subject: Re: [PATCH v4] x86/microcode/intel: Blacklist the specific BDW-EP for late loading Message-ID: <20171228122428.4t2lsutuo3y2i75c@gmail.com> References: <1514292147-101928-1-git-send-email-qianyue.zj@alibaba-inc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1514292147-101928-1-git-send-email-qianyue.zj@alibaba-inc.com> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Jia Zhang wrote: > Instead of blacklisting all types of Broadwell processor when running > a late loading, only BDW-EP (signature 0x406f1, aka family 6, model 79, > stepping 1) with the microcode version less than 0x0b000021 needs to > be blacklisted. > > The erratum is documented in the the public documentation #334165 (See > the item BDF90 for details). > > Signed-off-by: Jia Zhang > --- > arch/x86/kernel/cpu/microcode/intel.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c > index 8ccdca6..79cad85 100644 > --- a/arch/x86/kernel/cpu/microcode/intel.c > +++ b/arch/x86/kernel/cpu/microcode/intel.c > @@ -910,8 +910,16 @@ static bool is_blacklisted(unsigned int cpu) > { > struct cpuinfo_x86 *c = &cpu_data(cpu); > > - if (c->x86 == 6 && c->x86_model == INTEL_FAM6_BROADWELL_X) { > - pr_err_once("late loading on model 79 is disabled.\n"); > + /* > + * The Broadwell-EP processor with the microcode version less > + * then 0x0b000021 may result in system hang when running a late > + * loading. This behavior is documented in item BDF90, #334165 > + * (Intel Xeon Processor E7-8800/4800 v4 Product Family). > + */ > + if (c->x86 == 6 && c->x86_model == INTEL_FAM6_BROADWELL_X && > + c->x86_mask == 0x01 && c->microcode < 0x0b000021) { > + pr_err_once("late loading on cpu (sig 0x406f1) is disabled " > + "due to erratum causing system hang.\n"); Please never break user-readable messages mid-sentence! This should be something like: pr_err_once("Late loading of the CPU microcode (sig 0x406f1) is disabled due to Intel erratum BDF90 causing system hangs.\n"); (note the spelling and readability improvements as well) Btw., what does 'sig 0x406f1' refer to? Thanks, Ingo