From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754615AbeAQUgQ (ORCPT ); Wed, 17 Jan 2018 15:36:16 -0500 Received: from mail-io0-f193.google.com ([209.85.223.193]:41169 "EHLO mail-io0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753928AbeAQUgM (ORCPT ); Wed, 17 Jan 2018 15:36:12 -0500 X-Google-Smtp-Source: ACJfBouk7PYZecg2NTJ79hAQDgWd+pTTL1LLpQ+WOMX8pK7t7kdhwupgadJOfoU4XxmmQotNT6cjWg== From: oscardagrach Cc: oscardagrach , Wei Xu , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: hikey: Enable HS200 mode on eMMC Date: Wed, 17 Jan 2018 14:35:30 -0600 Message-Id: <20180117203531.17152-1-ryan@edited.us> X-Mailer: git-send-email 2.11.0 To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to the hi6220 datasheet, the MMC controller is JEDEC eMMC 4.5 compliant, in addition to supporting a clock of up to 150MHz. The Hikey schematic also indicates the device utilizes 1.8v signaling. Define these parameters in the device tree to enable HS200 mode. Signed-off-by: Ryan Grachek --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index 3aee6123d161..964e43e05ac6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -299,7 +299,9 @@ /* GPIO blocks 16 thru 19 do not appear to be routed to pins */ dwmmc_0: dwmmc0@f723d000 { + max-frequency = <150000000>; cap-mmc-highspeed; + mmc-hs200-1_8v; non-removable; bus-width = <0x8>; vmmc-supply = <&ldo19>; -- 2.11.0