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From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@intel.com
Cc: tglx@linutronix.de, mingo@redhat.com,
	linux-kernel@vger.kernel.org, acme@kernel.org,
	eranian@google.com, ak@linux.intel.com
Subject: Re: [PATCH V5 4/8] perf/x86/intel/uncore: add new data structures for free running counters
Date: Thu, 18 Jan 2018 14:32:48 +0100	[thread overview]
Message-ID: <20180118133248.GC2249@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <1516042629-387021-4-git-send-email-kan.liang@intel.com>

On Mon, Jan 15, 2018 at 10:57:05AM -0800, kan.liang@intel.com wrote:
> From: Kan Liang <Kan.liang@intel.com>
> 
> There are a number of free running counters introduced for uncore, which
> provide highly valuable information to a wide array of customers.
> For example, Skylake Server has IIO free running counters to collect
> Input/Output x BW/Utilization.
> The precious generic counters could be saved to collect other customer
> interested data.
> 
> The free running counter is read-only and always active. Current generic
> uncore code does not support this kind of counters.
> 
> Introduce a new index to indicate the free running counters. Only one
> index is enough for all free running counters. Because the free running
> countes are always active, and the event and free running counter are
> always 1:1 mapped. It does not need extra index to indicate the assigned
> counter.
> 
> Introduce some rules to encode the event for free running counters.
> - The event for free running counter has the same event code 0xff as the
>   event for fixed counter.
> - The umask of the event starts from 0x10. The umask which is less than
>   0x10 is reserved for the event of fixed counter.
> - The free running counters can be divided into different types
>   according to the MSR location, bit width or definition. The start
>   point of the umask for different type has 0x10 offset.
> For example, there are three types of IIO free running counters on
> Skylake server, IO CLOCKS counters, BANDWIDTH counters and UTILIZATION
> counters.
> The event code for all free running counters is 0xff.
> 'ioclk' is the first counter of IO CLOCKS. IO CLOCKS is the first type
> of free running counters, which umask starts from 0x10.
> So 'ioclk' is encoded as event=0xff,umask=0x10
> 'bw_in_port2' is the third counter of BANDWIDTH counters. BANDWIDTH is
> the second type which umask starts from 0x20.
> So 'bw_in_port2' is encoded as event=0xff,umask=0x22.
> 
> Introduce a new data structure to store free running counters related
> information for each type. It includes the number of counters, bit
> width, base address, offset between counters and offset between boxes.
> 
> Introduce several inline helpers to check index for fixed counter and
> free running counter, validate free running counter event, and retrieve
> the free running counter information according to box and event.

Sorry, none of this makes any sense, what?

WTH would all free running counters, which presumably count different
things, have the same event code ?

And whats the hackery with the umask do?

Please rewrite this in comprehensible form and also give rationale for
the various choices.

  reply	other threads:[~2018-01-18 13:32 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-15 18:57 [PATCH V5 1/8] perf/x86/intel/uncore: customized event_read for client IMC uncore kan.liang
2018-01-15 18:57 ` [PATCH V5 2/8] perf/x86/intel/uncore: correct fixed counter index check for NHM kan.liang
2018-01-15 18:57 ` [PATCH V5 3/8] perf/x86/intel/uncore: correct fixed counter index check in generic code kan.liang
2018-01-15 18:57 ` [PATCH V5 4/8] perf/x86/intel/uncore: add new data structures for free running counters kan.liang
2018-01-18 13:32   ` Peter Zijlstra [this message]
2018-01-18 17:43     ` Liang, Kan
2018-01-19 13:07       ` Peter Zijlstra
2018-01-19 15:15         ` Liang, Kan
2018-01-19 17:19           ` Peter Zijlstra
2018-01-19 17:34             ` Stephane Eranian
2018-01-19 17:53             ` Liang, Kan
2018-01-19 17:55               ` Stephane Eranian
2018-01-19 18:00                 ` Liang, Kan
2018-01-19 20:18                   ` Stephane Eranian
2018-01-19 20:24                   ` Andi Kleen
2018-01-19 20:50                     ` Stephane Eranian
2018-01-19 20:51                       ` Stephane Eranian
2018-01-20  1:24                         ` Andi Kleen
2018-01-19 21:33                     ` Peter Zijlstra
2018-01-23 22:00                       ` Liang, Kan
2018-01-24 10:17                         ` Peter Zijlstra
2018-01-24 15:46                           ` Liang, Kan
2018-01-15 18:57 ` [PATCH V5 5/8] perf/x86/intel/uncore: add infrastructure for free running counter kan.liang
2018-01-15 18:57 ` [PATCH V5 6/8] perf/x86/intel/uncore: SKX support for IIO free running counters kan.liang
2018-01-15 18:57 ` [PATCH V5 7/8] perf/x86/intel/uncore: expose uncore_pmu_event functions kan.liang
2018-01-15 18:57 ` [PATCH V5 8/8] perf/x86/intel/uncore: clean up client IMC uncore kan.liang
2018-01-18  9:36 ` [PATCH V5 1/8] perf/x86/intel/uncore: customized event_read for " Thomas Gleixner

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