* [PATCH 2/2] MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers
2018-01-02 11:31 [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers Matt Redfearn
@ 2018-01-02 11:31 ` Matt Redfearn
2018-01-05 18:11 ` David Daney
2018-01-22 21:18 ` James Hogan
2018-01-05 18:11 ` [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers David Daney
` (2 subsequent siblings)
3 siblings, 2 replies; 7+ messages in thread
From: Matt Redfearn @ 2018-01-02 11:31 UTC (permalink / raw)
To: ralf; +Cc: linux-mips, linux-kernel, Matt Redfearn
Currently the bits to be masked when watchhi is read is defined inline
for each register. To avoid this, define the bits once and mask each
register with that value.
Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
---
arch/mips/kernel/watch.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
index 329d2209521d..0e61a5b7647f 100644
--- a/arch/mips/kernel/watch.c
+++ b/arch/mips/kernel/watch.c
@@ -48,21 +48,19 @@ void mips_read_watch_registers(void)
{
struct mips3264_watch_reg_state *watches =
¤t->thread.watch.mips3264;
+ unsigned int watchhi_mask = MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW;
+
switch (current_cpu_data.watch_reg_use_cnt) {
default:
BUG();
case 4:
- watches->watchhi[3] = (read_c0_watchhi3() &
- (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
+ watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask);
case 3:
- watches->watchhi[2] = (read_c0_watchhi2() &
- (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
+ watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask);
case 2:
- watches->watchhi[1] = (read_c0_watchhi1() &
- (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
+ watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask);
case 1:
- watches->watchhi[0] = (read_c0_watchhi0() &
- (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
+ watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask);
}
if (current_cpu_data.watch_reg_use_cnt == 1 &&
(watches->watchhi[0] & MIPS_WATCHHI_IRW) == 0) {
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 2/2] MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers
2018-01-02 11:31 ` [PATCH 2/2] MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers Matt Redfearn
@ 2018-01-05 18:11 ` David Daney
2018-01-22 21:18 ` James Hogan
1 sibling, 0 replies; 7+ messages in thread
From: David Daney @ 2018-01-05 18:11 UTC (permalink / raw)
To: Matt Redfearn, ralf; +Cc: linux-mips, linux-kernel
On 01/02/2018 03:31 AM, Matt Redfearn wrote:
> Currently the bits to be masked when watchhi is read is defined inline
> for each register. To avoid this, define the bits once and mask each
> register with that value.
>
> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Acked-by: David Daney <david.daney@cavium.com>
> ---
>
> arch/mips/kernel/watch.c | 14 ++++++--------
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
> index 329d2209521d..0e61a5b7647f 100644
> --- a/arch/mips/kernel/watch.c
> +++ b/arch/mips/kernel/watch.c
> @@ -48,21 +48,19 @@ void mips_read_watch_registers(void)
> {
> struct mips3264_watch_reg_state *watches =
> ¤t->thread.watch.mips3264;
> + unsigned int watchhi_mask = MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW;
> +
> switch (current_cpu_data.watch_reg_use_cnt) {
> default:
> BUG();
> case 4:
> - watches->watchhi[3] = (read_c0_watchhi3() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask);
> case 3:
> - watches->watchhi[2] = (read_c0_watchhi2() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask);
> case 2:
> - watches->watchhi[1] = (read_c0_watchhi1() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask);
> case 1:
> - watches->watchhi[0] = (read_c0_watchhi0() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask);
> }
> if (current_cpu_data.watch_reg_use_cnt == 1 &&
> (watches->watchhi[0] & MIPS_WATCHHI_IRW) == 0) {
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 2/2] MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers
2018-01-02 11:31 ` [PATCH 2/2] MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers Matt Redfearn
2018-01-05 18:11 ` David Daney
@ 2018-01-22 21:18 ` James Hogan
1 sibling, 0 replies; 7+ messages in thread
From: James Hogan @ 2018-01-22 21:18 UTC (permalink / raw)
To: Matt Redfearn; +Cc: ralf, linux-mips, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1846 bytes --]
On Tue, Jan 02, 2018 at 11:31:22AM +0000, Matt Redfearn wrote:
> Currently the bits to be masked when watchhi is read is defined inline
> for each register. To avoid this, define the bits once and mask each
> register with that value.
>
> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Cheers
James
> ---
>
> arch/mips/kernel/watch.c | 14 ++++++--------
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
> index 329d2209521d..0e61a5b7647f 100644
> --- a/arch/mips/kernel/watch.c
> +++ b/arch/mips/kernel/watch.c
> @@ -48,21 +48,19 @@ void mips_read_watch_registers(void)
> {
> struct mips3264_watch_reg_state *watches =
> ¤t->thread.watch.mips3264;
> + unsigned int watchhi_mask = MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW;
> +
> switch (current_cpu_data.watch_reg_use_cnt) {
> default:
> BUG();
> case 4:
> - watches->watchhi[3] = (read_c0_watchhi3() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask);
> case 3:
> - watches->watchhi[2] = (read_c0_watchhi2() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask);
> case 2:
> - watches->watchhi[1] = (read_c0_watchhi1() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask);
> case 1:
> - watches->watchhi[0] = (read_c0_watchhi0() &
> - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
> + watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask);
> }
> if (current_cpu_data.watch_reg_use_cnt == 1 &&
> (watches->watchhi[0] & MIPS_WATCHHI_IRW) == 0) {
> --
> 2.7.4
>
>
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers.
2018-01-02 11:31 [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers Matt Redfearn
2018-01-02 11:31 ` [PATCH 2/2] MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers Matt Redfearn
@ 2018-01-05 18:11 ` David Daney
2018-01-22 21:16 ` James Hogan
2018-02-01 16:06 ` James Hogan
3 siblings, 0 replies; 7+ messages in thread
From: David Daney @ 2018-01-05 18:11 UTC (permalink / raw)
To: Matt Redfearn, ralf; +Cc: linux-mips, linux-kernel
On 01/02/2018 03:31 AM, Matt Redfearn wrote:
> Currently the bits to be set in the watchhi register in addition to that
> requested by the user is defined inline for each register. To avoid
> this, define the bits once and or that in for each register.
>
> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Looks like a good cleanup/simplification...
Acked-by: David Daney <david.daney@cavium.com>
> ---
>
> arch/mips/kernel/watch.c | 17 +++++++----------
> 1 file changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
> index 19fcab7348b1..329d2209521d 100644
> --- a/arch/mips/kernel/watch.c
> +++ b/arch/mips/kernel/watch.c
> @@ -18,27 +18,24 @@
> void mips_install_watch_registers(struct task_struct *t)
> {
> struct mips3264_watch_reg_state *watches = &t->thread.watch.mips3264;
> + unsigned int watchhi = MIPS_WATCHHI_G | /* Trap all ASIDs */
> + MIPS_WATCHHI_IRW; /* Clear result bits */
> +
> switch (current_cpu_data.watch_reg_use_cnt) {
> default:
> BUG();
> case 4:
> write_c0_watchlo3(watches->watchlo[3]);
> - /* Write 1 to the I, R, and W bits to clear them, and
> - 1 to G so all ASIDs are trapped. */
> - write_c0_watchhi3(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[3]);
> + write_c0_watchhi3(watchhi | watches->watchhi[3]);
> case 3:
> write_c0_watchlo2(watches->watchlo[2]);
> - write_c0_watchhi2(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[2]);
> + write_c0_watchhi2(watchhi | watches->watchhi[2]);
> case 2:
> write_c0_watchlo1(watches->watchlo[1]);
> - write_c0_watchhi1(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[1]);
> + write_c0_watchhi1(watchhi | watches->watchhi[1]);
> case 1:
> write_c0_watchlo0(watches->watchlo[0]);
> - write_c0_watchhi0(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[0]);
> + write_c0_watchhi0(watchhi | watches->watchhi[0]);
> }
> }
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers.
2018-01-02 11:31 [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers Matt Redfearn
2018-01-02 11:31 ` [PATCH 2/2] MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers Matt Redfearn
2018-01-05 18:11 ` [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers David Daney
@ 2018-01-22 21:16 ` James Hogan
2018-02-01 16:06 ` James Hogan
3 siblings, 0 replies; 7+ messages in thread
From: James Hogan @ 2018-01-22 21:16 UTC (permalink / raw)
To: Matt Redfearn; +Cc: ralf, linux-mips, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2048 bytes --]
On Tue, Jan 02, 2018 at 11:31:21AM +0000, Matt Redfearn wrote:
> Currently the bits to be set in the watchhi register in addition to that
> requested by the user is defined inline for each register. To avoid
> this, define the bits once and or that in for each register.
>
> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Cheers
James
> ---
>
> arch/mips/kernel/watch.c | 17 +++++++----------
> 1 file changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
> index 19fcab7348b1..329d2209521d 100644
> --- a/arch/mips/kernel/watch.c
> +++ b/arch/mips/kernel/watch.c
> @@ -18,27 +18,24 @@
> void mips_install_watch_registers(struct task_struct *t)
> {
> struct mips3264_watch_reg_state *watches = &t->thread.watch.mips3264;
> + unsigned int watchhi = MIPS_WATCHHI_G | /* Trap all ASIDs */
> + MIPS_WATCHHI_IRW; /* Clear result bits */
> +
> switch (current_cpu_data.watch_reg_use_cnt) {
> default:
> BUG();
> case 4:
> write_c0_watchlo3(watches->watchlo[3]);
> - /* Write 1 to the I, R, and W bits to clear them, and
> - 1 to G so all ASIDs are trapped. */
> - write_c0_watchhi3(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[3]);
> + write_c0_watchhi3(watchhi | watches->watchhi[3]);
> case 3:
> write_c0_watchlo2(watches->watchlo[2]);
> - write_c0_watchhi2(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[2]);
> + write_c0_watchhi2(watchhi | watches->watchhi[2]);
> case 2:
> write_c0_watchlo1(watches->watchlo[1]);
> - write_c0_watchhi1(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[1]);
> + write_c0_watchhi1(watchhi | watches->watchhi[1]);
> case 1:
> write_c0_watchlo0(watches->watchlo[0]);
> - write_c0_watchhi0(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[0]);
> + write_c0_watchhi0(watchhi | watches->watchhi[0]);
> }
> }
>
> --
> 2.7.4
>
>
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers.
2018-01-02 11:31 [PATCH 1/2] MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers Matt Redfearn
` (2 preceding siblings ...)
2018-01-22 21:16 ` James Hogan
@ 2018-02-01 16:06 ` James Hogan
3 siblings, 0 replies; 7+ messages in thread
From: James Hogan @ 2018-02-01 16:06 UTC (permalink / raw)
To: Matt Redfearn; +Cc: ralf, linux-mips, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2043 bytes --]
On Tue, Jan 02, 2018 at 11:31:21AM +0000, Matt Redfearn wrote:
> Currently the bits to be set in the watchhi register in addition to that
> requested by the user is defined inline for each register. To avoid
> this, define the bits once and or that in for each register.
>
> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Both patches applied to my 4.16 branch,
Thanks
James
> ---
>
> arch/mips/kernel/watch.c | 17 +++++++----------
> 1 file changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
> index 19fcab7348b1..329d2209521d 100644
> --- a/arch/mips/kernel/watch.c
> +++ b/arch/mips/kernel/watch.c
> @@ -18,27 +18,24 @@
> void mips_install_watch_registers(struct task_struct *t)
> {
> struct mips3264_watch_reg_state *watches = &t->thread.watch.mips3264;
> + unsigned int watchhi = MIPS_WATCHHI_G | /* Trap all ASIDs */
> + MIPS_WATCHHI_IRW; /* Clear result bits */
> +
> switch (current_cpu_data.watch_reg_use_cnt) {
> default:
> BUG();
> case 4:
> write_c0_watchlo3(watches->watchlo[3]);
> - /* Write 1 to the I, R, and W bits to clear them, and
> - 1 to G so all ASIDs are trapped. */
> - write_c0_watchhi3(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[3]);
> + write_c0_watchhi3(watchhi | watches->watchhi[3]);
> case 3:
> write_c0_watchlo2(watches->watchlo[2]);
> - write_c0_watchhi2(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[2]);
> + write_c0_watchhi2(watchhi | watches->watchhi[2]);
> case 2:
> write_c0_watchlo1(watches->watchlo[1]);
> - write_c0_watchhi1(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[1]);
> + write_c0_watchhi1(watchhi | watches->watchhi[1]);
> case 1:
> write_c0_watchlo0(watches->watchlo[0]);
> - write_c0_watchhi0(MIPS_WATCHHI_G | MIPS_WATCHHI_IRW |
> - watches->watchhi[0]);
> + write_c0_watchhi0(watchhi | watches->watchhi[0]);
> }
> }
>
> --
> 2.7.4
>
>
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^ permalink raw reply [flat|nested] 7+ messages in thread