From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752441AbeAWSp0 (ORCPT ); Tue, 23 Jan 2018 13:45:26 -0500 Received: from www.llwyncelyn.cymru ([82.70.14.225]:58396 "EHLO fuzix.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752292AbeAWSpZ (ORCPT ); Tue, 23 Jan 2018 13:45:25 -0500 Date: Tue, 23 Jan 2018 18:45:19 +0000 From: Alan Cox To: David Woodhouse Cc: linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 5/5] x86/pti: Do not enable PTI on fixed Intel processors Message-ID: <20180123173312.1d8cf02f@alans-desktop> In-Reply-To: <1516726375-25168-6-git-send-email-dwmw@amazon.co.uk> References: <1516726375-25168-1-git-send-email-dwmw@amazon.co.uk> <1516726375-25168-6-git-send-email-dwmw@amazon.co.uk> Organization: Intel Corporation X-Mailer: Claws Mail 3.15.1-dirty (GTK+ 2.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 23 Jan 2018 16:52:55 +0000 David Woodhouse wrote: > When they advertise the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO > bit set, they don't need KPTI either. This is starting to get messy because we will eventually need to integrate AMD processors - no meltdown but spectre VIA processors - probably no vulnerabilities at least on the old ones Intel with ND set - No meltdown Anybody with no speculation - No meltdown, no spectre, no id bit and it expands a lot with all sorts of 32bit processors. Would it make more sense to make it table driven or do we want a separate function so we can do: if (!in_order_cpu()) { } around the whole lot ? I'm guessing the latter makes sense then somethhing like this patch I'm running on my old atom widgets in 64bit mode static __initdata struct x86_cpu_id cpu_in_order[] = { { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW, X86_FEATURE_ANY }, {} }; static int in_order_cpu(void) { /* Processors with CPU id etc */ if (x86_match_cpu(cpu_in_order)) return 1; /* Other rules here */ return 0; } Alan