From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x2260lW1XrCdkeCV7uarjku7PhqjPns7JHeRyevC0yjdtGb3lAyM8ckH65tqmIJICDGaOCsFA ARC-Seal: i=1; a=rsa-sha256; t=1516731131; cv=none; d=google.com; s=arc-20160816; b=z+lWacoKzIUStlb2dWtoXSNcwRPf5SIE1Tzb4Ww5221ipIIw8rRujJgMPL2eAt4UsZ UTl6A9Zqk4P+krt1oQfp9vnMIZgOIXGhyUrxWdEpPgROjAN6TIFDI8Gy/og38Vgo2BBe +ARo062vOQKnRxPY0l84/mniCS5bFzGTvyeMrsDB0UMdYmZODvS/J9eJFx7o591xrES4 3mWs+525FD5FCaD3WgKAU+1BGvwPPswRjr8sOHJCtA3bLIRTpDursoKuGLtLlSngrPkV uX0Sq18n+Rt5SoWpdC8q4vXAjUCGiRisYbz9cMyK7qwYkyAO6MfZQTltJFrCYL54b5ca s6rA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-disposition:mime-version:references :message-id:subject:cc:to:from:date:arc-authentication-results; bh=6awm+by6E2nKzHMdfDxl/KyGgTjzcwbDlgY5MD63w6w=; b=t6zeEVF1+eLHe2VI5/EfrvTcDV6OOJ1BqrChoVSv5CPxSQ13PpPgZAcWKsDncpVOtH 8vc7yPYje0wInv8W9GCmJmn7Jq15ym+mwKcUNugMlKtDuG+9aVR6oLf9mgIRdi7F+RWp E08HKoyyammlDlEN9xB0pSK9ceQzjrmFGqktEPALZ0/KsKAExrtOIOlujijPdUKB4axV +Fx33W9d26b6IQ7CJbVESyKeW6g5GjGBB3z/DEHoyswtnVDyiIlq1ZGZUodkk7DJ58EF YvuFmooga2dUdPhY2NEj3BiS0BiLRs6o5kgHwunrhs0AA6pzzQWlILFPIRkr03iND3H3 RsIg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of ak@linux.intel.com designates 134.134.136.100 as permitted sender) smtp.mailfrom=ak@linux.intel.com Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of ak@linux.intel.com designates 134.134.136.100 as permitted sender) smtp.mailfrom=ak@linux.intel.com X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,402,1511856000"; d="scan'208";a="168536767" Date: Tue, 23 Jan 2018 10:12:01 -0800 From: Andi Kleen To: David Woodhouse Cc: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org, thomas.lendacky@amd.com Subject: Re: [PATCH v2 5/5] x86/pti: Do not enable PTI on fixed Intel processors Message-ID: <20180123181201.GO7844@tassilo.jf.intel.com> References: <1516726375-25168-1-git-send-email-dwmw@amazon.co.uk> <1516726375-25168-6-git-send-email-dwmw@amazon.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1516726375-25168-6-git-send-email-dwmw@amazon.co.uk> User-Agent: Mutt/1.9.1 (2017-09-22) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590402913825670017?= X-GMAIL-MSGID: =?utf-8?q?1590407862660317299?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: > > - if (c->x86_vendor != X86_VENDOR_AMD) > - setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); > + if (c->x86_vendor != X86_VENDOR_AMD) { > + u64 ia32_cap = 0; > + > + if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES)) > + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); > + if (!(ia32_cap & ARCH_CAP_RDCL_NO)) > + setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); This means that in a hypervisor which passes through the CPUID, but actually doesn't implement the MSR (so rdmsr #GPs and returns 0) it would be cleared. It would be better to usr rdmsrl_safe and check the return value. -Andi