From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Tue, 23 Jan 2018 19:31:09 +0100 From: Greg KH To: Dave Hansen Cc: David Woodhouse , arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, thomas.lendacky@amd.com Subject: Re: [PATCH v2 4/5] x86/msr: Add definitions for new speculation control MSRs Message-ID: <20180123183109.GA12453@kroah.com> References: <1516726375-25168-1-git-send-email-dwmw@amazon.co.uk> <1516726375-25168-5-git-send-email-dwmw@amazon.co.uk> <18ca2a5a-17df-e889-9c11-f5ee4c46de53@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <18ca2a5a-17df-e889-9c11-f5ee4c46de53@intel.com> User-Agent: Mutt/1.9.2 (2017-12-15) X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Tue, Jan 23, 2018 at 10:27:24AM -0800, Dave Hansen wrote: > On 01/23/2018 08:52 AM, David Woodhouse wrote: > > +#define MSR_IA32_ARCH_CAPABILITIES 0x0000010a > > +#define ARCH_CAP_RDCL_NO (1 << 0) /* Not susceptible to Meltdown */ > > +#define ARCH_CAP_IBRS_ALL (1 << 1) /* Enhanced IBRS support */ > > Do we want to spell out the silly Intel acronym? I don't know how we > fit it on the right side, but I do think we need to do it _somewhere_. > We need the code to stand on its own to some degree and not subject the > masses to reading the spec to understand the code. Yes please, take pity on us :) thanks, greg k-h