From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965017AbeAXS07 (ORCPT ); Wed, 24 Jan 2018 13:26:59 -0500 Received: from www.llwyncelyn.cymru ([82.70.14.225]:36428 "EHLO fuzix.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964850AbeAXS06 (ORCPT ); Wed, 24 Jan 2018 13:26:58 -0500 Date: Wed, 24 Jan 2018 18:26:42 +0000 From: Alan Cox To: TimGuo Cc: , , , , , , , , , , Subject: Re: [PATCH] x86/centaur: Mark TSC invariant Message-ID: <20180124182642.0669c9bd@alans-desktop> In-Reply-To: <1515980145-3693-1-git-send-email-timguo@zhaoxin.com> References: <1515980145-3693-1-git-send-email-timguo@zhaoxin.com> Organization: Intel Corporation X-Mailer: Claws Mail 3.15.1-dirty (GTK+ 2.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 15 Jan 2018 09:35:45 +0800 TimGuo wrote: > Centaur CPU has a constant frequency TSC and that TSC does not stop in C-States. > But because the flags are not set for that CPU, the TSC is treated as non constant > frequency and assumed to stop in C-States, which makes it an unreliable and unusable > clock source. Setting those flags tells the kernel that the TSC is usable, so it > will select it over HPET. The effect of this is that reading time stamps (from kernel > or userspace) will be faster and more efficient. And this is true for all processors back to IDT WinChip ? Alan