From: James Hogan <jhogan@kernel.org>
To: NeilBrown <neil@brown.name>
Cc: John Crispin <john@phrozen.org>,
Ralf Baechle <ralf@linux-mips.org>,
linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] MIPS: ralink: fix booting on mt7621
Date: Thu, 22 Mar 2018 00:11:56 +0000 [thread overview]
Message-ID: <20180322001155.GD13126@saruman> (raw)
In-Reply-To: <871sge872l.fsf@notabene.neil.brown.name>
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On Wed, Mar 21, 2018 at 02:02:10PM +1100, NeilBrown wrote:
>
> Since commit 3af5a67c86a3 ("MIPS: Fix early CM probing") the MT7621
> has not been able to boot.
>
> This patched caused mips_cm_probe() to be called before
> mt7621.c::proc_soc_init().
>
> prom_soc_init() has a comment explaining that mips_cm_probe()
> "wipes out the bootloader config" and means that configuration
> registers are no longer available. It has some code to re-enable
> this config.
>
> Before this re-enable code is run, the sysc register cannot be
> read, so when SYSC_REG_CHIP_NAME0 is read, a garbage value
> is returned and panic() is called.
>
> If we move the config-repair code to the top of prom_soc_init(),
> the registers can be read and boot can proceed.
>
> Very occasionally, the first register read after the reconfiguration
> returns garbage. So I added a call to __sync().
>
> Fixes: 3af5a67c86a3 ("MIPS: Fix early CM probing")
> Signed-off-by: NeilBrown <neil@brown.name>
Looks good. I've cosmetically tweaked commit message (mainly reflow),
added stable tag for 4.5+, and applied for 4.16.
Thanks
James
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prev parent reply other threads:[~2018-03-22 0:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-20 4:00 [PATCH] MIPS: ralink: fix booting on mt7621 NeilBrown
2018-03-20 8:22 ` [PATCH v2] " NeilBrown
2018-03-20 11:01 ` Matt Redfearn
2018-03-21 3:00 ` NeilBrown
2018-03-21 8:51 ` Matt Redfearn
2018-03-21 3:02 ` [PATCH v3] " NeilBrown
2018-03-21 8:52 ` Matt Redfearn
2018-03-22 0:11 ` James Hogan [this message]
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