From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752431AbeC3HYJ (ORCPT ); Fri, 30 Mar 2018 03:24:09 -0400 Received: from smtp57.i.mail.ru ([217.69.128.37]:43936 "EHLO smtp57.i.mail.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751085AbeC3HW5 (ORCPT ); Fri, 30 Mar 2018 03:22:57 -0400 From: Sergey Suloev To: Mark Brown , Maxime Ripard , Chen-Yu Tsai Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sergey Suloev Subject: [PATCH 2/6] spi: sun6i: handle chip select polarity flag Date: Fri, 30 Mar 2018 10:22:39 +0300 Message-Id: <20180330072243.19368-3-ssuloev@orpaltech.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180330072243.19368-1-ssuloev@orpaltech.com> References: <20180330072243.19368-1-ssuloev@orpaltech.com> Authentication-Results: smtp57.i.mail.ru; auth=pass smtp.auth=ssuloev@orpaltech.com smtp.mailfrom=ssuloev@orpaltech.com X-7FA49CB5: 0D63561A33F958A539CCA3AC6E934867BC0A8B6031D50A009606EB66F9EE38A7725E5C173C3A84C39D7D3120FB43BDE33E9F334EFAB29724B17145F0B7815491C4224003CC836476C0CAF46E325F83A50BF2EBBBDD9D6B0F05F538519369F3743B503F486389A921A5CC5B56E945C8DA X-Mailru-Sender: C5364AD02485212F3ACDC11E67D849176E7C3182A54F3193B3A26EEC0DFD2AE6069BFC61DABEEB110841D3AAAB1726C63DDE9B364B0DF289264D2CD8C2503E8C22A194DADEED8EEDCA01A23BA9CD1BE7ED14614B50AE0675 X-Mras: OK Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The chip select polarity flag is declared as supported but is not handled in the code. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index ff790dc..f992a7d 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -193,6 +193,12 @@ static void sun6i_spi_set_cs(struct spi_device *spi, bool enable) else reg &= ~SUN6I_TFR_CTL_CS_LEVEL; + /* Handle chip select "reverse" polarity */ + if (spi->mode & SPI_CS_HIGH) + reg &= ~SUN6I_TFR_CTL_SPOL; + else + reg |= SUN6I_TFR_CTL_SPOL; + /* We want to control the chip select manually */ reg |= SUN6I_TFR_CTL_CS_MANUAL; -- 2.16.2